{"id":"https://openalex.org/W2920072919","doi":"https://doi.org/10.1109/tencon.2018.8650476","title":"Bandwidth Stealing TDMA Arbitration for Real-Time Multiprocessor Applications","display_name":"Bandwidth Stealing TDMA Arbitration for Real-Time Multiprocessor Applications","publication_year":2018,"publication_date":"2018-10-01","ids":{"openalex":"https://openalex.org/W2920072919","doi":"https://doi.org/10.1109/tencon.2018.8650476","mag":"2920072919"},"language":"en","primary_location":{"id":"doi:10.1109/tencon.2018.8650476","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tencon.2018.8650476","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"TENCON 2018 - 2018 IEEE Region 10 Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5081073679","display_name":"Muhammad Nadeem","orcid":"https://orcid.org/0000-0002-1358-6085"},"institutions":[{"id":"https://openalex.org/I154130895","display_name":"University of Auckland","ror":"https://ror.org/03b94tp07","country_code":"NZ","type":"education","lineage":["https://openalex.org/I154130895"]}],"countries":["NZ"],"is_corresponding":true,"raw_author_name":"Muhammad Nadeem","raw_affiliation_strings":["Dept. of Electrical and Computer Engg., The University of Auckland, Auckland, New Zealand"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical and Computer Engg., The University of Auckland, Auckland, New Zealand","institution_ids":["https://openalex.org/I154130895"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018887219","display_name":"Heejong Park","orcid":"https://orcid.org/0000-0001-8979-2283"},"institutions":[{"id":"https://openalex.org/I154130895","display_name":"University of Auckland","ror":"https://ror.org/03b94tp07","country_code":"NZ","type":"education","lineage":["https://openalex.org/I154130895"]}],"countries":["NZ"],"is_corresponding":false,"raw_author_name":"Heejong Park","raw_affiliation_strings":["Dept. of Electrical and Computer Engg., The University of Auckland, Auckland, New Zealand"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical and Computer Engg., The University of Auckland, Auckland, New Zealand","institution_ids":["https://openalex.org/I154130895"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007782699","display_name":"Avinash Malik","orcid":"https://orcid.org/0000-0002-7524-8292"},"institutions":[{"id":"https://openalex.org/I154130895","display_name":"University of Auckland","ror":"https://ror.org/03b94tp07","country_code":"NZ","type":"education","lineage":["https://openalex.org/I154130895"]}],"countries":["NZ"],"is_corresponding":false,"raw_author_name":"Avinash Malik","raw_affiliation_strings":["Dept. of Electrical and Computer Engg., The University of Auckland, Auckland, New Zealand"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical and Computer Engg., The University of Auckland, Auckland, New Zealand","institution_ids":["https://openalex.org/I154130895"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5081073679"],"corresponding_institution_ids":["https://openalex.org/I154130895"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.20716206,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"37","issue":null,"first_page":"1504","last_page":"1509"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8178966045379639},{"id":"https://openalex.org/keywords/time-division-multiple-access","display_name":"Time division multiple access","score":0.7694752812385559},{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.7552893757820129},{"id":"https://openalex.org/keywords/arbitration","display_name":"Arbitration","score":0.7349894046783447},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.6197086572647095},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5732927918434143},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.5453575849533081},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5377576351165771},{"id":"https://openalex.org/keywords/processor-scheduling","display_name":"Processor scheduling","score":0.5298224091529846},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4537437856197357},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.4357910752296448},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.25556260347366333},{"id":"https://openalex.org/keywords/resource","display_name":"Resource (disambiguation)","score":0.18679100275039673},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08613982796669006}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8178966045379639},{"id":"https://openalex.org/C117313154","wikidata":"https://www.wikidata.org/wiki/Q878344","display_name":"Time division multiple access","level":2,"score":0.7694752812385559},{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.7552893757820129},{"id":"https://openalex.org/C160151201","wikidata":"https://www.wikidata.org/wiki/Q207946","display_name":"Arbitration","level":2,"score":0.7349894046783447},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.6197086572647095},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5732927918434143},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.5453575849533081},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5377576351165771},{"id":"https://openalex.org/C2984822820","wikidata":"https://www.wikidata.org/wiki/Q1123036","display_name":"Processor scheduling","level":3,"score":0.5298224091529846},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4537437856197357},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.4357910752296448},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.25556260347366333},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.18679100275039673},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08613982796669006},{"id":"https://openalex.org/C199539241","wikidata":"https://www.wikidata.org/wiki/Q7748","display_name":"Law","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C17744445","wikidata":"https://www.wikidata.org/wiki/Q36442","display_name":"Political science","level":0,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tencon.2018.8650476","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tencon.2018.8650476","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"TENCON 2018 - 2018 IEEE Region 10 Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1606583766","https://openalex.org/W1984887461","https://openalex.org/W2012760068","https://openalex.org/W2057433895","https://openalex.org/W2076285066","https://openalex.org/W2103820503","https://openalex.org/W2108024087","https://openalex.org/W2113130027","https://openalex.org/W2119699246","https://openalex.org/W2119959854","https://openalex.org/W2120080222","https://openalex.org/W2141964508","https://openalex.org/W2151606410","https://openalex.org/W2246360910","https://openalex.org/W4246678617","https://openalex.org/W6690915031"],"related_works":["https://openalex.org/W4281711577","https://openalex.org/W2120080222","https://openalex.org/W2178653557","https://openalex.org/W2540211551","https://openalex.org/W2106200299","https://openalex.org/W2994908368","https://openalex.org/W2905228630","https://openalex.org/W2990850308","https://openalex.org/W4238425097","https://openalex.org/W2062808533"],"abstract_inverted_index":{"An":[0],"especially":[1],"daunting":[2],"challenge":[3],"of":[4,38,46],"scheduling":[5],"real-time":[6,71,82],"applications":[7,83],"on":[8,11,84,99],"multiprocessor":[9],"system":[10],"chip":[12],"(MPSoC)":[13],"is":[14],"to":[15,20,23,91,115,126,135],"incorporate":[16],"timing":[17,33],"anomalies":[18],"due":[19],"access":[21],"contention":[22,55],"shared":[24,53,88,96],"resources.":[25],"Time":[26],"division":[27],"multiplex":[28],"arbitration":[29,56],"(TDMA)":[30],"provides":[31],"static":[32,116],"guarantees":[34,133],"at":[35],"the":[36,42,47,70,92,106],"cost":[37],"significant":[39],"loss":[40],"in":[41,69],"average":[43],"case":[44],"performance":[45,76],"application.":[48,72],"This":[49],"paper":[50,74],"presents":[51],"a":[52,85,95,100,121],"resource":[54],"approach":[57,108],"allowing":[58],"high":[59],"bus":[60,111],"utilization":[61,113],"while":[62],"guaranteeing":[63],"WCET":[64],"values":[65],"for":[66],"all":[67],"tasks":[68],"The":[73,102],"includes":[75],"results":[77,103],"obtained":[78],"by":[79],"executing":[80],"hard":[81],"MPSoC":[86],"with":[87],"memory":[89],"connected":[90],"processors":[93],"via":[94],"bus,":[97],"implemented":[98],"FPGA.":[101],"show":[104],"that":[105],"proposed":[107],"provides:":[109],"1":[110],"bandwidth":[112,123],"close":[114],"priority":[117],"based":[118],"arbitration,":[119,129],"2":[120],"fairer":[122],"distribution":[124],"compared":[125],"round":[127],"robin":[128],"and":[130],"3":[131],"latency":[132],"identical":[134],"TDMA.":[136]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
