{"id":"https://openalex.org/W4417337096","doi":"https://doi.org/10.1109/tcss.2025.3632912","title":"Hyper-Parallel Superscalar Asynchronous RISC-V Processor Based on Event-Driven Logic","display_name":"Hyper-Parallel Superscalar Asynchronous RISC-V Processor Based on Event-Driven Logic","publication_year":2025,"publication_date":"2025-12-15","ids":{"openalex":"https://openalex.org/W4417337096","doi":"https://doi.org/10.1109/tcss.2025.3632912"},"language":null,"primary_location":{"id":"doi:10.1109/tcss.2025.3632912","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcss.2025.3632912","pdf_url":null,"source":{"id":"https://openalex.org/S2490693980","display_name":"IEEE Transactions on Computational Social Systems","issn_l":"2329-924X","issn":["2329-924X","2373-7476"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computational Social Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010727695","display_name":"Kangli Zhao","orcid":"https://orcid.org/0009-0009-7570-4815"},"institutions":[{"id":"https://openalex.org/I76214153","display_name":"Lanzhou University","ror":"https://ror.org/01mkqqe32","country_code":"CN","type":"education","lineage":["https://openalex.org/I76214153"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kangli Zhao","raw_affiliation_strings":["School of Information Science and Engineering, Lanzhou University, Lanzhou, China"],"raw_orcid":"https://orcid.org/0009-0009-7570-4815","affiliations":[{"raw_affiliation_string":"School of Information Science and Engineering, Lanzhou University, Lanzhou, China","institution_ids":["https://openalex.org/I76214153"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045333131","display_name":"Anping He","orcid":"https://orcid.org/0000-0003-1913-2057"},"institutions":[{"id":"https://openalex.org/I76214153","display_name":"Lanzhou University","ror":"https://ror.org/01mkqqe32","country_code":"CN","type":"education","lineage":["https://openalex.org/I76214153"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Anping He","raw_affiliation_strings":["School of Information Science and Engineering, Lanzhou University, Lanzhou, China"],"raw_orcid":"https://orcid.org/0000-0003-1913-2057","affiliations":[{"raw_affiliation_string":"School of Information Science and Engineering, Lanzhou University, Lanzhou, China","institution_ids":["https://openalex.org/I76214153"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Jun Ma","orcid":"https://orcid.org/0009-0009-3875-8638"},"institutions":[{"id":"https://openalex.org/I76214153","display_name":"Lanzhou University","ror":"https://ror.org/01mkqqe32","country_code":"CN","type":"education","lineage":["https://openalex.org/I76214153"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jun Ma","raw_affiliation_strings":["School of Information Science and Engineering, Lanzhou University, Lanzhou, China"],"raw_orcid":"https://orcid.org/0009-0009-3875-8638","affiliations":[{"raw_affiliation_string":"School of Information Science and Engineering, Lanzhou University, Lanzhou, China","institution_ids":["https://openalex.org/I76214153"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100427814","display_name":"Lixin Zhang","orcid":"https://orcid.org/0000-0002-4789-238X"},"institutions":[{"id":"https://openalex.org/I76214153","display_name":"Lanzhou University","ror":"https://ror.org/01mkqqe32","country_code":"CN","type":"education","lineage":["https://openalex.org/I76214153"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lixin Zhang","raw_affiliation_strings":["School of Information Science and Engineering, Lanzhou University, Lanzhou, China"],"raw_orcid":"https://orcid.org/0000-0002-4789-238X","affiliations":[{"raw_affiliation_string":"School of Information Science and Engineering, Lanzhou University, Lanzhou, China","institution_ids":["https://openalex.org/I76214153"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009520634","display_name":"Lixian Zhu","orcid":"https://orcid.org/0000-0002-9842-9993"},"institutions":[{"id":"https://openalex.org/I125839683","display_name":"Beijing Institute of Technology","ror":"https://ror.org/01skt4w74","country_code":"CN","type":"education","lineage":["https://openalex.org/I125839683","https://openalex.org/I890469752"]},{"id":"https://openalex.org/I142415962","display_name":"Beijing Institute of Education","ror":"https://ror.org/03aefdx31","country_code":"CN","type":"facility","lineage":["https://openalex.org/I142415962"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lixian Zhu","raw_affiliation_strings":["Key Laboratory of Brain Health Intelligent Evaluation and Intervention (Beijing Institute of Technology), Ministry of Education, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0002-9842-9993","affiliations":[{"raw_affiliation_string":"Key Laboratory of Brain Health Intelligent Evaluation and Intervention (Beijing Institute of Technology), Ministry of Education, Beijing, China","institution_ids":["https://openalex.org/I125839683","https://openalex.org/I142415962"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057680942","display_name":"Qunxi Dong","orcid":"https://orcid.org/0000-0002-0484-3019"},"institutions":[{"id":"https://openalex.org/I125839683","display_name":"Beijing Institute of Technology","ror":"https://ror.org/01skt4w74","country_code":"CN","type":"education","lineage":["https://openalex.org/I125839683","https://openalex.org/I890469752"]},{"id":"https://openalex.org/I142415962","display_name":"Beijing Institute of Education","ror":"https://ror.org/03aefdx31","country_code":"CN","type":"facility","lineage":["https://openalex.org/I142415962"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qunxi Dong","raw_affiliation_strings":["Key Laboratory of Brain Health Intelligent Evaluation and Intervention (Beijing Institute of Technology), Ministry of Education, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0002-0484-3019","affiliations":[{"raw_affiliation_string":"Key Laboratory of Brain Health Intelligent Evaluation and Intervention (Beijing Institute of Technology), Ministry of Education, Beijing, China","institution_ids":["https://openalex.org/I125839683","https://openalex.org/I142415962"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037994828","display_name":"Fuze Tian","orcid":"https://orcid.org/0000-0001-6734-0585"},"institutions":[{"id":"https://openalex.org/I76214153","display_name":"Lanzhou University","ror":"https://ror.org/01mkqqe32","country_code":"CN","type":"education","lineage":["https://openalex.org/I76214153"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fuze Tian","raw_affiliation_strings":["School of Information Science and Engineering, Lanzhou University, Lanzhou, China"],"raw_orcid":"https://orcid.org/0000-0001-6734-0585","affiliations":[{"raw_affiliation_string":"School of Information Science and Engineering, Lanzhou University, Lanzhou, China","institution_ids":["https://openalex.org/I76214153"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100604365","display_name":"Qingguo Zhou","orcid":"https://orcid.org/0000-0001-8054-5446"},"institutions":[{"id":"https://openalex.org/I76214153","display_name":"Lanzhou University","ror":"https://ror.org/01mkqqe32","country_code":"CN","type":"education","lineage":["https://openalex.org/I76214153"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qingguo Zhou","raw_affiliation_strings":["School of Information Science and Engineering, Lanzhou University, Lanzhou, China"],"raw_orcid":"https://orcid.org/0000-0001-8054-5446","affiliations":[{"raw_affiliation_string":"School of Information Science and Engineering, Lanzhou University, Lanzhou, China","institution_ids":["https://openalex.org/I76214153"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5037184751","display_name":"Qinglin Zhao","orcid":"https://orcid.org/0000-0001-5690-666X"},"institutions":[{"id":"https://openalex.org/I76214153","display_name":"Lanzhou University","ror":"https://ror.org/01mkqqe32","country_code":"CN","type":"education","lineage":["https://openalex.org/I76214153"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qinglin Zhao","raw_affiliation_strings":["School of Information Science and Engineering, Lanzhou University, Lanzhou, China"],"raw_orcid":"https://orcid.org/0000-0001-5690-666X","affiliations":[{"raw_affiliation_string":"School of Information Science and Engineering, Lanzhou University, Lanzhou, China","institution_ids":["https://openalex.org/I76214153"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3075,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.58535092,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":"13","issue":"2","first_page":"2450","last_page":"2460"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.6326000094413757,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.6326000094413757,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.19920000433921814,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.04820000007748604,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.792900025844574},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.4634000062942505},{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.46000000834465027},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4429999887943268},{"id":"https://openalex.org/keywords/instruction-level-parallelism","display_name":"Instruction-level parallelism","score":0.4117000102996826},{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.4032999873161316},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.36649999022483826},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.35580000281333923},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.35199999809265137},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.3515999913215637}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8342000246047974},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.792900025844574},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.635200023651123},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5045999884605408},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.4634000062942505},{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.46000000834465027},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4429999887943268},{"id":"https://openalex.org/C140763907","wikidata":"https://www.wikidata.org/wiki/Q2714055","display_name":"Instruction-level parallelism","level":3,"score":0.4117000102996826},{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.4032999873161316},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.36649999022483826},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36649999022483826},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.35580000281333923},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.35199999809265137},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.3515999913215637},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.34459999203681946},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.33959999680519104},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.3328999876976013},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.3246999979019165},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.31200000643730164},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.30630001425743103},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.30239999294281006},{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.2994000017642975},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.29499998688697815},{"id":"https://openalex.org/C66727535","wikidata":"https://www.wikidata.org/wiki/Q7662199","display_name":"Synchronizer","level":2,"score":0.28780001401901245},{"id":"https://openalex.org/C42992933","wikidata":"https://www.wikidata.org/wiki/Q691169","display_name":"Task parallelism","level":3,"score":0.2858999967575073},{"id":"https://openalex.org/C83283714","wikidata":"https://www.wikidata.org/wiki/Q121117","display_name":"Supercomputer","level":2,"score":0.2745000123977661},{"id":"https://openalex.org/C170595534","wikidata":"https://www.wikidata.org/wiki/Q249743","display_name":"Very long instruction word","level":2,"score":0.26100000739097595},{"id":"https://openalex.org/C157547923","wikidata":"https://www.wikidata.org/wiki/Q7197276","display_name":"Pipeline burst cache","level":5,"score":0.260699987411499},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.25920000672340393},{"id":"https://openalex.org/C61483411","wikidata":"https://www.wikidata.org/wiki/Q3124522","display_name":"Data parallelism","level":3,"score":0.2590999901294708},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.25859999656677246},{"id":"https://openalex.org/C118993495","wikidata":"https://www.wikidata.org/wiki/Q5042828","display_name":"Electrical efficiency","level":3,"score":0.2572000026702881},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.25429999828338623},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.25130000710487366},{"id":"https://openalex.org/C190475519","wikidata":"https://www.wikidata.org/wiki/Q544384","display_name":"Massively parallel","level":2,"score":0.250900000333786},{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.25049999356269836}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcss.2025.3632912","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcss.2025.3632912","pdf_url":null,"source":{"id":"https://openalex.org/S2490693980","display_name":"IEEE Transactions on Computational Social Systems","issn_l":"2329-924X","issn":["2329-924X","2373-7476"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computational Social Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W1604973310","https://openalex.org/W2032692294","https://openalex.org/W2048762589","https://openalex.org/W2549667233","https://openalex.org/W2612701173","https://openalex.org/W2783525259","https://openalex.org/W2963481123","https://openalex.org/W3036016986","https://openalex.org/W3094389730","https://openalex.org/W3139657805","https://openalex.org/W3185068381","https://openalex.org/W4225981436","https://openalex.org/W4232754046","https://openalex.org/W4309618925","https://openalex.org/W4316660345","https://openalex.org/W4383112473","https://openalex.org/W4386211161","https://openalex.org/W4386523780","https://openalex.org/W4391242892","https://openalex.org/W4392008717","https://openalex.org/W4401990252","https://openalex.org/W4403826895","https://openalex.org/W4405180710","https://openalex.org/W4408790746","https://openalex.org/W4409102087","https://openalex.org/W4409154696","https://openalex.org/W4409985243","https://openalex.org/W4410869003","https://openalex.org/W4411019608","https://openalex.org/W4414110573"],"related_works":[],"abstract_inverted_index":{"Event-driven":[0],"neuromorphic":[1],"computing":[2],"involves":[3],"sparse":[4,67],"and":[5,15,29,107,128],"asynchronous":[6,77,93],"signal":[7],"activity,":[8],"which":[9,50],"leads":[10],"to":[11,24,62,101],"irregular":[12],"computation":[13,68],"patterns":[14],"fine-grained":[16],"concurrency.":[17],"As":[18],"a":[19,91,119,141,149],"result,":[20],"processing":[21],"architectures":[22],"need":[23],"support":[25],"both":[26],"high":[27,43],"parallelism":[28,44],"energy":[30],"efficiency.":[31],"Among":[32],"existing":[33],"architectural":[34],"solutions,":[35],"superscalar":[36,48,78],"designs":[37],"exhibit":[38],"significant":[39],"potential":[40],"for":[41],"addressing":[42],"demands.":[45],"However,":[46],"conventional":[47],"processors,":[49],"rely":[51],"on":[52],"synchronous":[53],"circuits,":[54],"maintain":[55],"high-frequency":[56],"clocking":[57,83],"at":[58,135],"all":[59],"times,":[60],"leading":[61],"substantial":[63],"power":[64,151],"inefficiency":[65],"in":[66],"scenarios.":[69],"To":[70],"address":[71],"this":[72],"issue,":[73],"we":[74],"propose":[75],"an":[76],"architecture":[79],"that":[80],"replaces":[81],"global":[82],"with":[84,148],"fully":[85],"local":[86],"handshake-based":[87],"control,":[88],"implemented":[89],"using":[90,118],"bundled-data":[92],"protocol.":[94],"The":[95],"design":[96],"supports":[97],"decoding":[98],"of":[99,145,153],"up":[100],"64":[102],"scalar":[103],"instructions":[104],"per":[105],"cycle":[106],"implements":[108],"the":[109,138],"RISC-V":[110],"RV32IMC":[111],"instruction":[112],"set.":[113],"A":[114],"prototype":[115],"was":[116,129],"fabricated":[117],"110":[120],"nm":[121],"complementary":[122],"metal":[123],"oxide":[124],"semiconductor":[125],"(CMOS)":[126],"process":[127],"evaluated":[130],"through":[131],"post-layout":[132],"simulation.":[133],"Operating":[134],"1.2":[136],"V,":[137],"processor":[139],"delivers":[140],"peak":[142],"INT8":[143],"throughput":[144],"669.4":[146],"GOPS,":[147],"static":[150],"consumption":[152],"421":[154],"mW.":[155]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-12-15T00:00:00"}