{"id":"https://openalex.org/W7084767825","doi":"https://doi.org/10.1109/tcsii.2025.3616124","title":"A 0.006-mm <sup>2</sup> 0.96-LSB-INL <sub>PP</sub> 8\u201314-GHz 7b Twin-PI Using an Unequal-Weight Combiner With a Self-Biased-PLL Based Low-Power Compact 4-Phase Clock Generator","display_name":"A 0.006-mm <sup>2</sup> 0.96-LSB-INL <sub>PP</sub> 8\u201314-GHz 7b Twin-PI Using an Unequal-Weight Combiner With a Self-Biased-PLL Based Low-Power Compact 4-Phase Clock Generator","publication_year":2025,"publication_date":"2025-10-06","ids":{"openalex":"https://openalex.org/W7084767825","doi":"https://doi.org/10.1109/tcsii.2025.3616124"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2025.3616124","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2025.3616124","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Yixi Li","orcid":"https://orcid.org/0009-0002-3981-4717"},"institutions":[{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yixi Li","raw_affiliation_strings":["Chinese Academy of Sciences, State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Beijing, China"],"raw_orcid":"https://orcid.org/0009-0002-3981-4717","affiliations":[{"raw_affiliation_string":"Chinese Academy of Sciences, State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Beijing, China","institution_ids":["https://openalex.org/I4210149211"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Zhao Zhang","orcid":"https://orcid.org/0000-0002-9009-9045"},"institutions":[{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhao Zhang","raw_affiliation_strings":["Chinese Academy of Sciences, State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0002-9009-9045","affiliations":[{"raw_affiliation_string":"Chinese Academy of Sciences, State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Beijing, China","institution_ids":["https://openalex.org/I4210149211"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Xinyu Shen","orcid":null},"institutions":[{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xinyu Shen","raw_affiliation_strings":["Chinese Academy of Sciences, State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chinese Academy of Sciences, State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Beijing, China","institution_ids":["https://openalex.org/I4210149211"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Jian Liu","orcid":"https://orcid.org/0000-0001-8057-2444"},"institutions":[{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jian Liu","raw_affiliation_strings":["Chinese Academy of Sciences, State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0001-8057-2444","affiliations":[{"raw_affiliation_string":"Chinese Academy of Sciences, State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Beijing, China","institution_ids":["https://openalex.org/I4210149211"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Nanjian Wu","orcid":"https://orcid.org/0000-0001-8022-0262"},"institutions":[{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Nanjian Wu","raw_affiliation_strings":["Chinese Academy of Sciences, State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0001-8022-0262","affiliations":[{"raw_affiliation_string":"Chinese Academy of Sciences, State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Beijing, China","institution_ids":["https://openalex.org/I4210149211"]}]},{"author_position":"last","author":{"id":null,"display_name":"Liyuan Liu","orcid":"https://orcid.org/0000-0003-2585-323X"},"institutions":[{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Liyuan Liu","raw_affiliation_strings":["Chinese Academy of Sciences, State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0003-2585-323X","affiliations":[{"raw_affiliation_string":"Chinese Academy of Sciences, State Key Laboratory of Semiconductor Physics and Chip Technologies, Institute of Semiconductors, Beijing, China","institution_ids":["https://openalex.org/I4210149211"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210149211"],"apc_list":null,"apc_paid":null,"fwci":13.6377,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.98487794,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":97,"max":98},"biblio":{"volume":"72","issue":"11","first_page":"1700","last_page":"1704"},"is_retracted":false,"is_paratext":false,"is_xpac":true,"primary_topic":{"id":"https://openalex.org/T12289","display_name":"Library Science and Administration","score":0.33070001006126404,"subfield":{"id":"https://openalex.org/subfields/3309","display_name":"Library and Information Sciences"},"field":{"id":"https://openalex.org/fields/33","display_name":"Social Sciences"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}},"topics":[{"id":"https://openalex.org/T12289","display_name":"Library Science and Administration","score":0.33070001006126404,"subfield":{"id":"https://openalex.org/subfields/3309","display_name":"Library and Information Sciences"},"field":{"id":"https://openalex.org/fields/33","display_name":"Social Sciences"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}},{"id":"https://openalex.org/T10712","display_name":"Library Science and Information Literacy","score":0.10849999636411667,"subfield":{"id":"https://openalex.org/subfields/3309","display_name":"Library and Information Sciences"},"field":{"id":"https://openalex.org/fields/33","display_name":"Social Sciences"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}},{"id":"https://openalex.org/T11657","display_name":"Digital and Traditional Archives Management","score":0.06539999693632126,"subfield":{"id":"https://openalex.org/subfields/1206","display_name":"Conservation"},"field":{"id":"https://openalex.org/fields/12","display_name":"Arts and Humanities"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.6446999907493591},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5393000245094299},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.48739999532699585},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.4530999958515167},{"id":"https://openalex.org/keywords/clock-domain-crossing","display_name":"Clock domain crossing","score":0.429500013589859},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4124000072479248},{"id":"https://openalex.org/keywords/current-mode-logic","display_name":"Current-mode logic","score":0.4088999927043915},{"id":"https://openalex.org/keywords/cpu-multiplier","display_name":"CPU multiplier","score":0.3765000104904175},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.36239999532699585}],"concepts":[{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.6446999907493591},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5654000043869019},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5393000245094299},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5091999769210815},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.48739999532699585},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4715000092983246},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.4530999958515167},{"id":"https://openalex.org/C127204226","wikidata":"https://www.wikidata.org/wiki/Q5134799","display_name":"Clock domain crossing","level":5,"score":0.429500013589859},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.420199990272522},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4124000072479248},{"id":"https://openalex.org/C2780295579","wikidata":"https://www.wikidata.org/wiki/Q5195108","display_name":"Current-mode logic","level":3,"score":0.4088999927043915},{"id":"https://openalex.org/C125576049","wikidata":"https://www.wikidata.org/wiki/Q2246273","display_name":"CPU multiplier","level":5,"score":0.3765000104904175},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.36239999532699585},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.3569999933242798},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.35350000858306885},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.3508000075817108},{"id":"https://openalex.org/C110086884","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase detector","level":3,"score":0.3310999870300293},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.3228999972343445},{"id":"https://openalex.org/C207912722","wikidata":"https://www.wikidata.org/wiki/Q1259123","display_name":"Signal generator","level":3,"score":0.3050000071525574},{"id":"https://openalex.org/C155512373","wikidata":"https://www.wikidata.org/wiki/Q287450","display_name":"Residual","level":2,"score":0.3034999966621399},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.302700012922287},{"id":"https://openalex.org/C2776158855","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase frequency detector","level":5,"score":0.2858999967575073},{"id":"https://openalex.org/C113074038","wikidata":"https://www.wikidata.org/wiki/Q5276052","display_name":"Digital clock manager","level":5,"score":0.2833999991416931},{"id":"https://openalex.org/C44280652","wikidata":"https://www.wikidata.org/wiki/Q104837","display_name":"Phase (matter)","level":2,"score":0.2824999988079071},{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.2809999883174896},{"id":"https://openalex.org/C74982907","wikidata":"https://www.wikidata.org/wiki/Q1455624","display_name":"Frequency divider","level":3,"score":0.2800999879837036}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2025.3616124","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2025.3616124","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8454200625419617,"display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G1409370577","display_name":null,"funder_award_id":"2021YFB2206504","funder_id":"https://openalex.org/F4320335777","funder_display_name":"National Key Research and Development Program of China"},{"id":"https://openalex.org/G5819522783","display_name":null,"funder_award_id":"Z231100005923003","funder_id":"https://openalex.org/F4320335480","funder_display_name":"Guangzhou Municipal Science and Technology Project"},{"id":"https://openalex.org/G6834717405","display_name":null,"funder_award_id":"62222409","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G733082133","display_name":null,"funder_award_id":"62174153","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320335480","display_name":"Guangzhou Municipal Science and Technology Project","ror":null},{"id":"https://openalex.org/F4320335777","display_name":"National Key Research and Development Program of China","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W2090004819","https://openalex.org/W2145923236","https://openalex.org/W2790961995","https://openalex.org/W3015749170","https://openalex.org/W3016099273","https://openalex.org/W3183277854","https://openalex.org/W3214185915","https://openalex.org/W4220963760","https://openalex.org/W4293198705","https://openalex.org/W4312661261","https://openalex.org/W4321484140","https://openalex.org/W4360605382","https://openalex.org/W4385221250","https://openalex.org/W4400235438"],"related_works":[],"abstract_inverted_index":{"This":[0],"brief":[1],"presents":[2],"a":[3,10,60,82,90],"high-linearity":[4],"twin":[5],"phase":[6],"interpolator":[7],"(PI)":[8],"with":[9,49,74],"self-biased":[11],"PLL":[12],"(SB-PLL)":[13],"based":[14,62],"low-power":[15],"4-phase":[16,71],"clock":[17,64,72],"generator.":[18],"An":[19],"unequal-weight":[20],"integrating-mode":[21],"combiner":[22,54],"(UEQW-IMCB)":[23],"is":[24,67,117],"proposed":[25,40],"to":[26],"eliminate":[27],"the":[28,36,39],"residual":[29],"nonlinearity":[30],"introduced":[31,68],"by":[32],"non-ideal":[33],"factors":[34],"in":[35,56,81],"twin-PI.":[37,58],"Besides,":[38],"UEQW-IMCB":[41],"reduces":[42],"power":[43,110],"consumption":[44,111],"and":[45,77,99,104,115],"area":[46,76,93],"occupation":[47],"compared":[48],"equal-weight":[50],"current":[51],"mode":[52],"logic":[53],"(EQW-CMLCB)":[55],"prior":[57],"Furthermore,":[59],"self-biased-PLL":[61],"multi-phase":[63],"generator":[65],"(MPCG)":[66],"for":[69],"reliable":[70],"generation":[73],"tiny":[75],"low":[78],"power.":[79],"Fabricated":[80],"28-nm":[83],"CMOS":[84],"process,":[85],"our":[86,113],"prototype":[87],"only":[88,118],"occupies":[89],"compact":[91],"core":[92],"of":[94,112],"0.006":[95],"mm<sup":[96],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[97,102],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>,":[98],"achieves":[100],"0.96-LSB-INL<sub":[101],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">PP</sub>":[103],"8-14-GHz":[105],"frequency":[106],"range.":[107],"The":[108],"total":[109],"MPCG":[114],"twin-PI":[116],"16.3":[119],"mW":[120],"at":[121],"14":[122],"GHz.":[123]},"counts_by_year":[{"year":2026,"cited_by_count":2}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}