{"id":"https://openalex.org/W4411639785","doi":"https://doi.org/10.1109/tcsii.2025.3583043","title":"Area-Efficient and Low-Power 8T Compute-SRAM Bitcell Design for Digital Compute-In-Memory Macros in 22nm CMOS","display_name":"Area-Efficient and Low-Power 8T Compute-SRAM Bitcell Design for Digital Compute-In-Memory Macros in 22nm CMOS","publication_year":2025,"publication_date":"2025-06-25","ids":{"openalex":"https://openalex.org/W4411639785","doi":"https://doi.org/10.1109/tcsii.2025.3583043"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2025.3583043","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2025.3583043","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5117596505","display_name":"Moxiao Lou","orcid":null},"institutions":[{"id":"https://openalex.org/I3045169105","display_name":"Southern University of Science and Technology","ror":"https://ror.org/049tv2d57","country_code":"CN","type":"education","lineage":["https://openalex.org/I3045169105"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Moxiao Lou","raw_affiliation_strings":["School of Microelectronics, Southern University of Science and Technology, Shenzhen, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Southern University of Science and Technology, Shenzhen, China","institution_ids":["https://openalex.org/I3045169105"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5092303018","display_name":"Jin Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I3045169105","display_name":"Southern University of Science and Technology","ror":"https://ror.org/049tv2d57","country_code":"CN","type":"education","lineage":["https://openalex.org/I3045169105"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jin Wang","raw_affiliation_strings":["School of Microelectronics, Southern University of Science and Technology, Shenzhen, China"],"raw_orcid":"https://orcid.org/0009-0003-8174-3542","affiliations":[{"raw_affiliation_string":"School of Microelectronics, Southern University of Science and Technology, Shenzhen, China","institution_ids":["https://openalex.org/I3045169105"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111301702","display_name":"Humiao Li","orcid":null},"institutions":[{"id":"https://openalex.org/I3045169105","display_name":"Southern University of Science and Technology","ror":"https://ror.org/049tv2d57","country_code":"CN","type":"education","lineage":["https://openalex.org/I3045169105"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Humiao Li","raw_affiliation_strings":["School of Microelectronics, Southern University of Science and Technology, Shenzhen, China"],"raw_orcid":"https://orcid.org/0009-0009-3508-982X","affiliations":[{"raw_affiliation_string":"School of Microelectronics, Southern University of Science and Technology, Shenzhen, China","institution_ids":["https://openalex.org/I3045169105"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089526765","display_name":"Zhengke Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I3045169105","display_name":"Southern University of Science and Technology","ror":"https://ror.org/049tv2d57","country_code":"CN","type":"education","lineage":["https://openalex.org/I3045169105"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhengke Yang","raw_affiliation_strings":["School of Microelectronics, Southern University of Science and Technology, Shenzhen, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Southern University of Science and Technology, Shenzhen, China","institution_ids":["https://openalex.org/I3045169105"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046207386","display_name":"Quan Cheng","orcid":"https://orcid.org/0000-0001-5519-3258"},"institutions":[{"id":"https://openalex.org/I22299242","display_name":"Kyoto University","ror":"https://ror.org/02kpeqv85","country_code":"JP","type":"education","lineage":["https://openalex.org/I22299242"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Quan Cheng","raw_affiliation_strings":["Department of Communications and Computer Engineering, Kyoto University, Kyoto, Japan"],"raw_orcid":"https://orcid.org/0000-0001-5519-3258","affiliations":[{"raw_affiliation_string":"Department of Communications and Computer Engineering, Kyoto University, Kyoto, Japan","institution_ids":["https://openalex.org/I22299242"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Jiamin Li","orcid":"https://orcid.org/0000-0002-3566-7855"},"institutions":[{"id":"https://openalex.org/I3045169105","display_name":"Southern University of Science and Technology","ror":"https://ror.org/049tv2d57","country_code":"CN","type":"education","lineage":["https://openalex.org/I3045169105"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jiamin Li","raw_affiliation_strings":["School of Microelectronics, Southern University of Science and Technology, Shenzhen, China"],"raw_orcid":"https://orcid.org/0000-0002-3566-7855","affiliations":[{"raw_affiliation_string":"School of Microelectronics, Southern University of Science and Technology, Shenzhen, China","institution_ids":["https://openalex.org/I3045169105"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002405139","display_name":"Masanori Hashimoto","orcid":"https://orcid.org/0000-0002-0377-2108"},"institutions":[{"id":"https://openalex.org/I22299242","display_name":"Kyoto University","ror":"https://ror.org/02kpeqv85","country_code":"JP","type":"education","lineage":["https://openalex.org/I22299242"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Masanori Hashimoto","raw_affiliation_strings":["Department of Communications and Computer Engineering, Kyoto University, Kyoto, Japan"],"raw_orcid":"https://orcid.org/0000-0002-0377-2108","affiliations":[{"raw_affiliation_string":"Department of Communications and Computer Engineering, Kyoto University, Kyoto, Japan","institution_ids":["https://openalex.org/I22299242"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5021091015","display_name":"Longyang Lin","orcid":"https://orcid.org/0000-0002-4702-737X"},"institutions":[{"id":"https://openalex.org/I3045169105","display_name":"Southern University of Science and Technology","ror":"https://ror.org/049tv2d57","country_code":"CN","type":"education","lineage":["https://openalex.org/I3045169105"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Longyang Lin","raw_affiliation_strings":["School of Microelectronics, Southern University of Science and Technology, Shenzhen, China"],"raw_orcid":"https://orcid.org/0000-0002-4702-737X","affiliations":[{"raw_affiliation_string":"School of Microelectronics, Southern University of Science and Technology, Shenzhen, China","institution_ids":["https://openalex.org/I3045169105"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.9371,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.86239844,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":97,"max":98},"biblio":{"volume":"72","issue":"11","first_page":"1605","last_page":"1609"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8007172346115112},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.73369300365448},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7258915901184082},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5347026586532593},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4621181786060333},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.46112295985221863},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2815759479999542},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2142571210861206},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.06765449047088623}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8007172346115112},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.73369300365448},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7258915901184082},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5347026586532593},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4621181786060333},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.46112295985221863},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2815759479999542},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2142571210861206},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.06765449047088623},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2025.3583043","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2025.3583043","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8399999737739563,"id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G2732527894","display_name":null,"funder_award_id":"62304099","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G4391071087","display_name":null,"funder_award_id":"2023QN10X177","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G6839350787","display_name":null,"funder_award_id":"62274081","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W2058490651","https://openalex.org/W2194775991","https://openalex.org/W2755826572","https://openalex.org/W2990591126","https://openalex.org/W3000301330","https://openalex.org/W3013739639","https://openalex.org/W3015432327","https://openalex.org/W3091826466","https://openalex.org/W3134526034","https://openalex.org/W3135906938","https://openalex.org/W3180627186","https://openalex.org/W4221038786","https://openalex.org/W4319459123","https://openalex.org/W4360605969","https://openalex.org/W4360606472","https://openalex.org/W4388838009","https://openalex.org/W4393140448","https://openalex.org/W4408183362"],"related_works":["https://openalex.org/W2030816003","https://openalex.org/W4392590355","https://openalex.org/W4239992647","https://openalex.org/W2150013480","https://openalex.org/W1554458299","https://openalex.org/W81423522","https://openalex.org/W1509860481","https://openalex.org/W2488264085","https://openalex.org/W2109445684","https://openalex.org/W2081082331"],"abstract_inverted_index":{"This":[0,43],"brief":[1],"presents":[2],"a":[3,49,75,81,119,127,134,145],"novel":[4],"compute-SRAM":[5],"bitcell":[6,34,60,94],"design":[7,68],"capable":[8],"of":[9,56,64,100,138],"performing":[10],"1-bit":[11],"digital":[12,15],"multiplication":[13],"for":[14],"compute-in-memory":[16],"(DCIM)":[17],"macros.":[18],"Unlike":[19],"the":[20,32,36,53,57,62,88,92,109,117],"conventional":[21],"approach,":[22],"which":[23],"requires":[24],"10":[25],"transistors":[26],"(6T":[27],"SRAM":[28],"+":[29],"4T":[30],"NOR),":[31],"proposed":[33,93],"achieves":[35],"same":[37],"functionality":[38],"with":[39],"only":[40],"8":[41],"transistors.":[42,66],"is":[44],"accomplished":[45],"by":[46],"efficiently":[47],"embedding":[48],"NOR":[50],"gate":[51,113],"into":[52],"latch":[54],"pair":[55],"traditional":[58],"6T":[59],"through":[61],"addition":[63],"two":[65],"The":[67,131],"enables":[69],"efficient":[70],"in-bitcell":[71],"compute":[72],"operations,":[73],"achieving":[74],"37.5%":[76],"reduction":[77,83],"in":[78,84,98],"area":[79],"and":[80,102,112],"41.5%":[82],"leakage":[85],"compared":[86],"to":[87,108],"10T":[89],"counterpart.":[90],"Moreover,":[91],"maintains":[95],"robust":[96],"stability":[97],"terms":[99],"write":[101],"hold":[103],"static":[104],"noise":[105],"margins,":[106],"thanks":[107],"sizing":[110],"strategy":[111],"overdrive.":[114],"To":[115],"validate":[116],"design,":[118],"64\u00d7":[120],"64":[121],"DCIM":[122],"macro":[123,132],"was":[124],"fabricated":[125],"using":[126],"22nm":[128],"CMOS":[129],"process.":[130],"demonstrates":[133],"peak":[135],"energy":[136],"efficiency":[137],"126":[139],"TOPS/W":[140],"at":[141],"INT4":[142],"precision":[143],"under":[144],"0.55":[146],"V":[147],"supply.":[148]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":4}],"updated_date":"2026-07-18T07:39:51.176621","created_date":"2025-10-10T00:00:00"}
