{"id":"https://openalex.org/W4399167826","doi":"https://doi.org/10.1109/tcsii.2024.3407592","title":"A Contention-Free Wordline Supporting Circuit for High Wordline Resistance in Sub-10-nm SRAM Designs","display_name":"A Contention-Free Wordline Supporting Circuit for High Wordline Resistance in Sub-10-nm SRAM Designs","publication_year":2024,"publication_date":"2024-05-30","ids":{"openalex":"https://openalex.org/W4399167826","doi":"https://doi.org/10.1109/tcsii.2024.3407592"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2024.3407592","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/tcsii.2024.3407592","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100439001","display_name":"Tae-Hyun Kim","orcid":"https://orcid.org/0000-0002-8991-0080"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Tae-Hyun Kim","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0002-8991-0080","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101793550","display_name":"Juhyun Park","orcid":"https://orcid.org/0000-0003-4631-442X"},"institutions":[{"id":"https://openalex.org/I134353371","display_name":"SK Group (South Korea)","ror":"https://ror.org/03696td91","country_code":"KR","type":"company","lineage":["https://openalex.org/I134353371"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Juhyun Park","raw_affiliation_strings":["Volume Product Design Group, DRAM Design Division, SK Hynix Inc., Icheon, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Volume Product Design Group, DRAM Design Division, SK Hynix Inc., Icheon, South Korea","institution_ids":["https://openalex.org/I134353371"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082265623","display_name":"In-Jun Jung","orcid":"https://orcid.org/0000-0002-3228-3725"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"In-Jun Jung","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0002-3228-3725","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039409248","display_name":"Hoonki Kim","orcid":"https://orcid.org/0000-0003-0720-6821"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hoonki Kim","raw_affiliation_strings":["Foundry Division, Samsung Electronics, Suwon, Gyeonggi, South Korea"],"raw_orcid":"https://orcid.org/0000-0003-0720-6821","affiliations":[{"raw_affiliation_string":"Foundry Division, Samsung Electronics, Suwon, Gyeonggi, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025919348","display_name":"Taejoong Song","orcid":"https://orcid.org/0000-0003-2752-3138"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Taejoong Song","raw_affiliation_strings":["Foundry Division, Samsung Electronics, Suwon, Gyeonggi, South Korea"],"raw_orcid":"https://orcid.org/0000-0003-2752-3138","affiliations":[{"raw_affiliation_string":"Foundry Division, Samsung Electronics, Suwon, Gyeonggi, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5037010076","display_name":"Seong\u2010Ook Jung","orcid":"https://orcid.org/0000-0003-0757-2581"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seong-Ook Jung","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea","Articron Inc, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0003-0757-2581","affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"Articron Inc, Seoul, South Korea","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1856,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.46646211,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":"71","issue":"10","first_page":"4531","last_page":"4535"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.6771042346954346},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6041615009307861},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.5804101228713989},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.548835039138794},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.4537397623062134},{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.43814605474472046},{"id":"https://openalex.org/keywords/replica","display_name":"Replica","score":0.4264417290687561},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.42587125301361084},{"id":"https://openalex.org/keywords/energy","display_name":"Energy (signal processing)","score":0.4113902747631073},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33082646131515503},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3094292879104614},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25134897232055664},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.209425151348114},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.19822841882705688},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.11730188131332397}],"concepts":[{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.6771042346954346},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6041615009307861},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.5804101228713989},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.548835039138794},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.4537397623062134},{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.43814605474472046},{"id":"https://openalex.org/C2775937380","wikidata":"https://www.wikidata.org/wiki/Q1232589","display_name":"Replica","level":2,"score":0.4264417290687561},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.42587125301361084},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.4113902747631073},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33082646131515503},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3094292879104614},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25134897232055664},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.209425151348114},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.19822841882705688},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.11730188131332397},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2024.3407592","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/tcsii.2024.3407592","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G4757329456","display_name":null,"funder_award_id":"IO201211-08089-01","funder_id":"https://openalex.org/F4320332195","funder_display_name":"Samsung"}],"funders":[{"id":"https://openalex.org/F4320332195","display_name":"Samsung","ror":"https://ror.org/04w3jy968"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W148021875","https://openalex.org/W1994688141","https://openalex.org/W2061251299","https://openalex.org/W2074628056","https://openalex.org/W2075221456","https://openalex.org/W2115539423","https://openalex.org/W2157973254","https://openalex.org/W2163676880","https://openalex.org/W2473481124","https://openalex.org/W2540920206","https://openalex.org/W2614850804","https://openalex.org/W2800129760","https://openalex.org/W3048861556","https://openalex.org/W3048906546","https://openalex.org/W3093756928","https://openalex.org/W4251013638","https://openalex.org/W4320713062","https://openalex.org/W4361765896","https://openalex.org/W6734703003","https://openalex.org/W6748797709"],"related_works":["https://openalex.org/W3013979739","https://openalex.org/W2655578171","https://openalex.org/W2577913821","https://openalex.org/W2460131733","https://openalex.org/W2953070151","https://openalex.org/W4398784231","https://openalex.org/W4388836178","https://openalex.org/W2031972468","https://openalex.org/W2539823950","https://openalex.org/W2030839013"],"abstract_inverted_index":{"A":[0,32,49],"contention-free":[1],"wordline":[2,29,43,67],"supporting":[3,50,120],"(CFWLS)":[4],"circuit":[5],"is":[6,106,126,155],"proposed":[7,81],"for":[8,152],"SRAM":[9,117],"in":[10,98,110,161],"sub-10":[11],"nm":[12,163],"technologies.":[13,164],"The":[14,80,102,122],"CFWLS":[15,82,138],"resolves":[16],"the":[17,42,55,58,66,76,90,99,115,132,146,149],"problem":[18],"of":[19,57,65,137],"performance":[20],"degradation":[21],"caused":[22],"by":[23,93,108,129,157],"significant":[24],"RC":[25],"delays":[26],"with":[27,46],"increasing":[28],"interconnect":[30],"resistance.":[31],"low-skewed":[33],"sensing":[34,100],"inverter":[35],"utilizes":[36],"a":[37,62,84,95,119,153],"diode-connected":[38],"PMOS":[39,51],"to":[40,54,114],"detect":[41],"rising":[44,104],"transition":[45],"negligible":[47],"contention.":[48],"supplies":[52],"charge":[53,71],"end":[56],"wordline.":[59],"By":[60],"using":[61,94],"replica":[63],"signal":[64],"enable":[68],"(WLENt),":[69],"sufficient":[70],"can":[72],"be":[73],"supplied":[74],"during":[75],"entire":[77],"evaluation":[78],"phase.":[79],"has":[83],"noise-tolerant":[85],"characteristic":[86],"because":[87],"it":[88],"complements":[89],"floating":[91],"node":[92],"pull-up":[96],"path":[97],"inverter.":[101],"WL":[103],"time":[105],"improved":[107,128,156],"48-57%":[109],"post-layout":[111],"simulation":[112],"compared":[113],"conventional":[116],"without":[118],"circuit.":[121],"clock-to-bitline":[123],"(half-VDD)":[124],"delay":[125,151],"also":[127],"20%,":[130],"while":[131],"energy":[133],"and":[134,142],"area":[135],"overheads":[136],"are":[139],"only":[140],"7%":[141],"1.7%,":[143],"respectively.":[144],"In":[145],"test-chip":[147],"measurements,":[148],"read":[150],"pass":[154],"180":[158],"ps":[159],"(16%)":[160],"sub-3":[162]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
