{"id":"https://openalex.org/W4387010348","doi":"https://doi.org/10.1109/tcsii.2023.3318577","title":"High Efficiency Variation-Aware SRAM Timing Characterization via Machine-Learning-Assisted Netlist Extraction","display_name":"High Efficiency Variation-Aware SRAM Timing Characterization via Machine-Learning-Assisted Netlist Extraction","publication_year":2023,"publication_date":"2023-09-25","ids":{"openalex":"https://openalex.org/W4387010348","doi":"https://doi.org/10.1109/tcsii.2023.3318577"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2023.3318577","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/tcsii.2023.3318577","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060416899","display_name":"Inseong Jeon","orcid":"https://orcid.org/0009-0001-0223-9280"},"institutions":[{"id":"https://openalex.org/I161024014","display_name":"Kwangwoon University","ror":"https://ror.org/02e9zc863","country_code":"KR","type":"education","lineage":["https://openalex.org/I161024014"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Inseong Jeon","raw_affiliation_strings":["Department of Electronic Engineering, Kwangwoon University, Seoul, Republic of Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Kwangwoon University, Seoul, Republic of Korea","institution_ids":["https://openalex.org/I161024014"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056992077","display_name":"Hyunho Park","orcid":"https://orcid.org/0000-0002-2723-972X"},"institutions":[{"id":"https://openalex.org/I161024014","display_name":"Kwangwoon University","ror":"https://ror.org/02e9zc863","country_code":"KR","type":"education","lineage":["https://openalex.org/I161024014"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyunho Park","raw_affiliation_strings":["Department of Electronic Engineering, Kwangwoon University, Seoul, Republic of Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Kwangwoon University, Seoul, Republic of Korea","institution_ids":["https://openalex.org/I161024014"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103175852","display_name":"Taehwan Yoon","orcid":null},"institutions":[{"id":"https://openalex.org/I161024014","display_name":"Kwangwoon University","ror":"https://ror.org/02e9zc863","country_code":"KR","type":"education","lineage":["https://openalex.org/I161024014"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Taehwan Yoon","raw_affiliation_strings":["Department of Electronic Engineering, Kwangwoon University, Seoul, Republic of Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Kwangwoon University, Seoul, Republic of Korea","institution_ids":["https://openalex.org/I161024014"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108522065","display_name":"Hanwool Jeong","orcid":null},"institutions":[{"id":"https://openalex.org/I161024014","display_name":"Kwangwoon University","ror":"https://ror.org/02e9zc863","country_code":"KR","type":"education","lineage":["https://openalex.org/I161024014"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hanwool Jeong","raw_affiliation_strings":["Department of Electronic Engineering, Kwangwoon University, Seoul, Republic of Korea","Articron Inc., Ansan, Republic of Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Kwangwoon University, Seoul, Republic of Korea","institution_ids":["https://openalex.org/I161024014"]},{"raw_affiliation_string":"Articron Inc., Ansan, Republic of Korea","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5060416899"],"corresponding_institution_ids":["https://openalex.org/I161024014"],"apc_list":null,"apc_paid":null,"fwci":0.1303,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.44538785,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":"71","issue":"3","first_page":"1391","last_page":"1395"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.983415424823761},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6583887338638306},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.5868436098098755},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5550546646118164},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5472903847694397},{"id":"https://openalex.org/keywords/monte-carlo-method","display_name":"Monte Carlo method","score":0.539587676525116},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.5394589900970459},{"id":"https://openalex.org/keywords/variation","display_name":"Variation (astronomy)","score":0.5312067270278931},{"id":"https://openalex.org/keywords/critical-path-method","display_name":"Critical path method","score":0.5207828879356384},{"id":"https://openalex.org/keywords/bayesian-optimization","display_name":"Bayesian optimization","score":0.4574027359485626},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.43374791741371155},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4255450963973999},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3405531048774719},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.29247355461120605},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.24696940183639526},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.1689995527267456},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.1647709310054779},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.16362300515174866},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1274988055229187},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12271106243133545},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.0850915014743805}],"concepts":[{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.983415424823761},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6583887338638306},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.5868436098098755},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5550546646118164},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5472903847694397},{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.539587676525116},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.5394589900970459},{"id":"https://openalex.org/C2778334786","wikidata":"https://www.wikidata.org/wiki/Q1586270","display_name":"Variation (astronomy)","level":2,"score":0.5312067270278931},{"id":"https://openalex.org/C115874739","wikidata":"https://www.wikidata.org/wiki/Q825377","display_name":"Critical path method","level":2,"score":0.5207828879356384},{"id":"https://openalex.org/C2778049539","wikidata":"https://www.wikidata.org/wiki/Q17002908","display_name":"Bayesian optimization","level":2,"score":0.4574027359485626},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.43374791741371155},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4255450963973999},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3405531048774719},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.29247355461120605},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.24696940183639526},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.1689995527267456},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.1647709310054779},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.16362300515174866},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1274988055229187},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12271106243133545},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0850915014743805},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C44870925","wikidata":"https://www.wikidata.org/wiki/Q37547","display_name":"Astrophysics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2023.3318577","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/tcsii.2023.3318577","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Reduced inequalities","score":0.6299999952316284,"id":"https://metadata.un.org/sdg/10"}],"awards":[{"id":"https://openalex.org/G2964706983","display_name":null,"funder_award_id":"SRFC-IT2102-06","funder_id":"https://openalex.org/F4320332195","funder_display_name":"Samsung"}],"funders":[{"id":"https://openalex.org/F4320332195","display_name":"Samsung","ror":"https://ror.org/04w3jy968"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1864905880","https://openalex.org/W2039638424","https://openalex.org/W2041230794","https://openalex.org/W2143762049","https://openalex.org/W2148461984","https://openalex.org/W2547566193","https://openalex.org/W2961876082","https://openalex.org/W4285609203","https://openalex.org/W6765960736"],"related_works":["https://openalex.org/W2119312496","https://openalex.org/W2546423063","https://openalex.org/W4247460323","https://openalex.org/W2537086382","https://openalex.org/W2107909712","https://openalex.org/W2153162275","https://openalex.org/W2079259690","https://openalex.org/W789543267","https://openalex.org/W2075123181","https://openalex.org/W2004965314"],"abstract_inverted_index":{"This":[0],"brief":[1],"presents":[2],"a":[3,24],"highly":[4],"efficient":[5],"methodology":[6],"for":[7],"reducing":[8],"SPICE":[9],"netlist":[10,25],"and":[11,72],"characterizing":[12],"variation-aware":[13],"timing,":[14],"utilizing":[15],"machine":[16],"learning":[17],"to":[18,69,81],"reduce":[19],"simulation":[20,76],"time.":[21],"We":[22,38],"present":[23],"reduction":[26],"algorithm":[27],"that":[28],"automatically":[29],"extracts":[30],"critical":[31,47],"path":[32],"components":[33],"using":[34],"several":[35],"exclusion":[36],"rules.":[37],"then":[39],"employ":[40],"simplified":[41],"RC":[42,52],"model":[43],"on":[44],"the":[45,50,62,70,75,82,89],"extracted":[46],"path,":[48],"where":[49],"parasitic":[51],"values":[53],"are":[54],"determined":[55],"through":[56],"Bayesian":[57],"Optimization.":[58],"Our":[59],"method":[60],"reduces":[61],"number":[63],"of":[64,95],"transistors":[65],"by":[66,78],"95.2-98.7%":[67],"compared":[68,80],"original":[71],"speeds":[73],"up":[74],"time":[77],"26-105x":[79],"conventional":[83],"1000":[84],"sample":[85],"Monte":[86],"Carlo":[87],"with":[88,91],"post-layout,":[90],"an":[92],"accuracy":[93],"loss":[94],"below":[96],"3.63%.":[97]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}
