{"id":"https://openalex.org/W4323519469","doi":"https://doi.org/10.1109/tcsii.2023.3253707","title":"A Two-Phase Multi-Bit Incremental ADC With Variable Loop Order","display_name":"A Two-Phase Multi-Bit Incremental ADC With Variable Loop Order","publication_year":2023,"publication_date":"2023-03-07","ids":{"openalex":"https://openalex.org/W4323519469","doi":"https://doi.org/10.1109/tcsii.2023.3253707"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2023.3253707","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2023.3253707","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5033564217","display_name":"Kaiquan Chen","orcid":"https://orcid.org/0000-0003-2484-6644"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kaiquan Chen","raw_affiliation_strings":["Department of Micro&#x2013;Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0003-2484-6644","affiliations":[{"raw_affiliation_string":"Department of Micro&#x2013;Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042595300","display_name":"Biao Wang","orcid":"https://orcid.org/0000-0002-8613-8689"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Biao Wang","raw_affiliation_strings":["Shanghai X-Ring Technology Company Ltd., Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0002-8613-8689","affiliations":[{"raw_affiliation_string":"Shanghai X-Ring Technology Company Ltd., Shanghai, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100350985","display_name":"Yan Liu","orcid":"https://orcid.org/0000-0001-5616-9428"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yan Liu","raw_affiliation_strings":["Department of Micro&#x2013;Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0001-5616-9428","affiliations":[{"raw_affiliation_string":"Department of Micro&#x2013;Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025053306","display_name":"Fan Ye","orcid":"https://orcid.org/0000-0002-1089-1498"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fan Ye","raw_affiliation_strings":["State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0002-1089-1498","affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073702117","display_name":"Sai\u2010Weng Sin","orcid":"https://orcid.org/0000-0001-9346-8291"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":false,"raw_author_name":"Sai-Weng Sin","raw_affiliation_strings":["State Key Laboratory of Analog and Mixed-Signal VLSI, Institute of Microelectronics, University of Macau, Macau, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, Institute of Microelectronics, University of Macau, Macau, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087716003","display_name":"Guoxing Wang","orcid":"https://orcid.org/0000-0002-0235-1475"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Guoxing Wang","raw_affiliation_strings":["Department of Micro&#x2013;Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0002-0235-1475","affiliations":[{"raw_affiliation_string":"Department of Micro&#x2013;Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061924587","display_name":"Yong Lian","orcid":"https://orcid.org/0000-0002-5289-5219"},"institutions":[{"id":"https://openalex.org/I192455969","display_name":"York University","ror":"https://ror.org/05fq50484","country_code":"CA","type":"education","lineage":["https://openalex.org/I192455969"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Yong Lian","raw_affiliation_strings":["Department of EECS, York University, Toronto, Canada"],"raw_orcid":"https://orcid.org/0000-0002-5289-5219","affiliations":[{"raw_affiliation_string":"Department of EECS, York University, Toronto, Canada","institution_ids":["https://openalex.org/I192455969"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007420130","display_name":"Liang Qi","orcid":"https://orcid.org/0000-0002-9512-4529"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Liang Qi","raw_affiliation_strings":["Department of Micro&#x2013;Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0002-9512-4529","affiliations":[{"raw_affiliation_string":"Department of Micro&#x2013;Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0972,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.3462286,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":"70","issue":"8","first_page":"2724","last_page":"2728"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5358544588088989},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.48161405324935913},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.4027664363384247},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.28109675645828247},{"id":"https://openalex.org/keywords/combinatorics","display_name":"Combinatorics","score":0.09643223881721497}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5358544588088989},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.48161405324935913},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.4027664363384247},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.28109675645828247},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.09643223881721497}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2023.3253707","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2023.3253707","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G5208698233","display_name":null,"funder_award_id":"SQ2022YFE020197","funder_id":"https://openalex.org/F4320335777","funder_display_name":"National Key Research and Development Program of China"}],"funders":[{"id":"https://openalex.org/F4320335777","display_name":"National Key Research and Development Program of China","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1582910515","https://openalex.org/W2033230242","https://openalex.org/W2073429379","https://openalex.org/W2443328199","https://openalex.org/W2479661333","https://openalex.org/W2607531354","https://openalex.org/W2794726899","https://openalex.org/W2909134018","https://openalex.org/W2911647543","https://openalex.org/W2913428688","https://openalex.org/W2921260700","https://openalex.org/W2976158853","https://openalex.org/W3015608507","https://openalex.org/W3106996514","https://openalex.org/W3153300956","https://openalex.org/W4226050173","https://openalex.org/W4285201316","https://openalex.org/W4285280740","https://openalex.org/W6668916148","https://openalex.org/W6721189077"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2051487156","https://openalex.org/W2073681303","https://openalex.org/W2390279801","https://openalex.org/W4391913857","https://openalex.org/W2358668433","https://openalex.org/W4396701345","https://openalex.org/W2376932109"],"abstract_inverted_index":{"This":[0],"brief":[1],"presents":[2],"a":[3,26,44,61,66,126,140,165,185],"two-phase":[4,67],"multi-bit":[5],"incremental":[6],"analog-to-digital":[7],"converter":[8],"(IADC)":[9],"with":[10,69,106,125],"variable":[11,70],"loop":[12,22,41],"order.":[13],"In":[14,33],"the":[15,21,34,40,54,73,76,90,102,111,119,147,150,163,191],"1":[16,27,91,171],"<sup":[17,28,36,46,92,172,176],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[18,29,37,47,93,173,177],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">st</sup>":[19,30,94,174],"phase,":[20,39],"filter":[23],"works":[24],"as":[25],"-order":[31,49,95],"topology.":[32],"2":[35],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">nd</sup>":[38],"reconfigures":[42],"to":[43,52,145,189],"3":[45],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">rd</sup>":[48,178],"structure,":[50],"aiming":[51],"get":[53],"signal-to-quantization-noise":[55],"ratio":[56],"(SQNR)":[57],"boosted":[58],"quickly":[59],"within":[60],"few":[62],"clock":[63,151],"cycles.":[64],"Such":[65],"scheme":[68],"loop-order":[71],"combines":[72],"features":[74],"of":[75,83,149,153,168],"KT/C":[77],"noise":[78,121],"suppression":[79],"and":[80,97,136],"high":[81],"effectiveness":[82,116],"data":[84],"weighting":[85],"averaging":[86],"(DWA)":[87],"presented":[88],"by":[89],"IADC":[96,113,180],"fast":[98],"accumulation":[99],"obtained":[100],"from":[101],"high-order":[103,128],"mode.":[104],"Thereby,":[105],"little":[107],"additional":[108],"circuitry":[109],"effort,":[110],"proposed":[112,131],"improves":[114],"DWA":[115],"while":[117],"mitigating":[118],"thermal":[120],"penalty":[122],"when":[123],"compared":[124],"pure":[127],"IADC.":[129],"The":[130],"architecture":[132],"is":[133,143],"analytically":[134],"analyzed":[135],"exemplarily":[137],"simulated.":[138],"Moreover,":[139],"design":[141],"guideline":[142],"provided":[144],"optimize":[146],"allocation":[148],"cycles":[152],"two":[154],"phases,":[155],"thus":[156],"balancing":[157],"various":[158],"significant":[159],"parameters.":[160],"Based":[161],"on":[162],"guideline,":[164],"circuit-level":[166],"simulation":[167],"an":[169],"exemplary":[170],"-to-3":[175],"order":[179],"was":[181],"carried":[182],"out":[183],"in":[184],"65-nm":[186],"CMOS":[187],"process":[188],"confirm":[190],"results.":[192]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}