{"id":"https://openalex.org/W4312739080","doi":"https://doi.org/10.1109/tcsii.2022.3214504","title":"Parallel-Prefix Adder in Spin-Orbit Torque Magnetic RAM for High Bit-Width Non-Volatile Computation","display_name":"Parallel-Prefix Adder in Spin-Orbit Torque Magnetic RAM for High Bit-Width Non-Volatile Computation","publication_year":2022,"publication_date":"2022-10-14","ids":{"openalex":"https://openalex.org/W4312739080","doi":"https://doi.org/10.1109/tcsii.2022.3214504"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2022.3214504","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2022.3214504","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022883244","display_name":"Ximing Li","orcid":"https://orcid.org/0000-0002-8571-8411"},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Ximing Li","raw_affiliation_strings":["School of Electronics and Information Technology, Sun Yat-sen University, Guangzhou, China"],"affiliations":[{"raw_affiliation_string":"School of Electronics and Information Technology, Sun Yat-sen University, Guangzhou, China","institution_ids":["https://openalex.org/I157773358"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040447044","display_name":"Xing Jin","orcid":"https://orcid.org/0000-0001-7134-4431"},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xing Jin","raw_affiliation_strings":["School of Electronics and Information Technology, Sun Yat-sen University, Guangzhou, China"],"affiliations":[{"raw_affiliation_string":"School of Electronics and Information Technology, Sun Yat-sen University, Guangzhou, China","institution_ids":["https://openalex.org/I157773358"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034446826","display_name":"Weichong Chen","orcid":"https://orcid.org/0000-0001-7804-6605"},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Weichong Chen","raw_affiliation_strings":["School of Microelectronics Science and Technology, Sun Yat-sen University, Zhuhai, China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics Science and Technology, Sun Yat-sen University, Zhuhai, China","institution_ids":["https://openalex.org/I157773358"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080839129","display_name":"Ningyuan Yin","orcid":"https://orcid.org/0000-0001-6307-0004"},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ningyuan Yin","raw_affiliation_strings":["Guangdong Provincial Key Laboratory of Optoelectronic Information Processing Chips and Systems, School of Microelectronics Science and Technology, Sun Yatsen University, Zhuhai, China"],"affiliations":[{"raw_affiliation_string":"Guangdong Provincial Key Laboratory of Optoelectronic Information Processing Chips and Systems, School of Microelectronics Science and Technology, Sun Yatsen University, Zhuhai, China","institution_ids":["https://openalex.org/I157773358"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5017560036","display_name":"Zhiyi Yu","orcid":"https://orcid.org/0000-0002-8802-0457"},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhiyi Yu","raw_affiliation_strings":["Guangdong Provincial Key Laboratory of Optoelectronic Information Processing Chips and Systems, School of Microelectronics Science and Technology, Sun Yatsen University, Zhuhai, China"],"affiliations":[{"raw_affiliation_string":"Guangdong Provincial Key Laboratory of Optoelectronic Information Processing Chips and Systems, School of Microelectronics Science and Technology, Sun Yatsen University, Zhuhai, China","institution_ids":["https://openalex.org/I157773358"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5022883244"],"corresponding_institution_ids":["https://openalex.org/I157773358"],"apc_list":null,"apc_paid":null,"fwci":1.1939,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.78570766,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":98},"biblio":{"volume":"70","issue":"2","first_page":"761","last_page":"765"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10049","display_name":"Magnetic properties of thin films","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10049","display_name":"Magnetic properties of thin films","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6527876257896423},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.6299833655357361},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5596106648445129},{"id":"https://openalex.org/keywords/magnetoresistive-random-access-memory","display_name":"Magnetoresistive random-access memory","score":0.4936910569667816},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4610610902309418},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.4534875750541687},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4468223452568054},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.4284136891365051},{"id":"https://openalex.org/keywords/logic-level","display_name":"Logic level","score":0.42003798484802246},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.41410428285598755},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.41193699836730957},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.35723987221717834},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3468158543109894},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2679376006126404},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.24339982867240906},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.19509488344192505},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1894698143005371},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15363678336143494},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.13656282424926758}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6527876257896423},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.6299833655357361},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5596106648445129},{"id":"https://openalex.org/C46891859","wikidata":"https://www.wikidata.org/wiki/Q1061546","display_name":"Magnetoresistive random-access memory","level":3,"score":0.4936910569667816},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4610610902309418},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.4534875750541687},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4468223452568054},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.4284136891365051},{"id":"https://openalex.org/C146569638","wikidata":"https://www.wikidata.org/wiki/Q173378","display_name":"Logic level","level":3,"score":0.42003798484802246},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.41410428285598755},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.41193699836730957},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.35723987221717834},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3468158543109894},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2679376006126404},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.24339982867240906},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.19509488344192505},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1894698143005371},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15363678336143494},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.13656282424926758},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2022.3214504","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2022.3214504","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G126202070","display_name":null,"funder_award_id":"2017YFA0206200","funder_id":"https://openalex.org/F4320335777","funder_display_name":"National Key Research and Development Program of China"},{"id":"https://openalex.org/G216664441","display_name":null,"funder_award_id":"2018YFB2202601","funder_id":"https://openalex.org/F4320335777","funder_display_name":"National Key Research and Development Program of China"},{"id":"https://openalex.org/G4305356344","display_name":null,"funder_award_id":"61834005","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G7437622746","display_name":null,"funder_award_id":"61902443","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320335777","display_name":"National Key Research and Development Program of China","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W2103954785","https://openalex.org/W2168543008","https://openalex.org/W2246960778","https://openalex.org/W2364964003","https://openalex.org/W2396622873","https://openalex.org/W2526677435","https://openalex.org/W2593172471","https://openalex.org/W2609332101","https://openalex.org/W2884227506","https://openalex.org/W2912505786","https://openalex.org/W2942415134","https://openalex.org/W3005729543","https://openalex.org/W3110953700","https://openalex.org/W3133874331","https://openalex.org/W3149617492","https://openalex.org/W3158227880","https://openalex.org/W4206481947","https://openalex.org/W4207063504"],"related_works":["https://openalex.org/W2082591327","https://openalex.org/W2108396794","https://openalex.org/W2171566066","https://openalex.org/W1593138522","https://openalex.org/W127821896","https://openalex.org/W2142702094","https://openalex.org/W2118487491","https://openalex.org/W2580743037","https://openalex.org/W2167525841","https://openalex.org/W2125567818"],"abstract_inverted_index":{"Recently,":[0],"many":[1],"computing-in-memory":[2],"(CIM)":[3],"systems":[4],"based":[5,41],"on":[6,42],"non-volatile":[7,38],"devices":[8],"have":[9],"been":[10],"implemented":[11],"well.":[12],"However,":[13],"they":[14],"perform":[15],"poorly":[16],"in":[17,35],"high":[18],"bit-width":[19],"processes":[20],"due":[21],"to":[22,72],"device":[23],"access":[24,51],"latency":[25],"and":[26],"energy":[27],"cost.":[28],"In":[29],"this":[30],"brief,":[31],"we":[32],"present":[33],"an":[34,91],"memory":[36],"fully":[37],"parallel-prefix":[39],"adder(PPA)":[40],"CIM":[43,58],"system":[44],"for":[45],"2T1MTJ":[46],"spin-orbit":[47],"torque":[48],"magnetic":[49],"random":[50],"memory(SOT":[52],"MRAM).":[53],"Unlike":[54],"traditional":[55,80],"CMOS":[56],"circuits,":[57],"prefers":[59],"uniform":[60],"logic":[61,69,78,82],"gates(only":[62],"AND":[63],"or":[64],"OR":[65],"gates":[66],"at":[67,106],"each":[68,77,107],"level).":[70],"Thus,":[71],"calculate":[73],"the":[74,112,116],"output":[75],"of":[76,102,115],"level,":[79],"AND/OR":[81],"is":[83],"substituted":[84],"with":[85],"MAJORITY/NOT":[86],"logic.":[87],"We":[88],"also":[89],"propose":[90],"optimized":[92],"logical":[93],"mapping":[94],"strategy":[95],"that":[96],"requires":[97],"one":[98],"write":[99,104],"operation":[100],"instead":[101],"continuous":[103],"operations":[105],"write-back":[108],"stage,":[109],"which":[110],"maximizes":[111],"performance":[113],"benefits":[114],"PPA.":[117]},"counts_by_year":[{"year":2025,"cited_by_count":5},{"year":2023,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}