{"id":"https://openalex.org/W4285264342","doi":"https://doi.org/10.1109/tcsii.2022.3190796","title":"An Implantable Phase Locked Loop MEMS-Based Readout System for Heart Transplantation","display_name":"An Implantable Phase Locked Loop MEMS-Based Readout System for Heart Transplantation","publication_year":2022,"publication_date":"2022-07-13","ids":{"openalex":"https://openalex.org/W4285264342","doi":"https://doi.org/10.1109/tcsii.2022.3190796"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2022.3190796","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2022.3190796","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://discovery.ucl.ac.uk/10152258/1/An_Implantable_Phase_Locked_Loop_MEMS.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005458223","display_name":"Nazanin Neshatvar","orcid":"https://orcid.org/0000-0002-0658-8883"},"institutions":[{"id":"https://openalex.org/I45129253","display_name":"University College London","ror":"https://ror.org/02jx3x895","country_code":"GB","type":"education","lineage":["https://openalex.org/I124357947","https://openalex.org/I45129253"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Nazanin Neshatvar","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, University College London, London, U.K"],"raw_orcid":"https://orcid.org/0000-0002-0658-8883","affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, University College London, London, U.K","institution_ids":["https://openalex.org/I45129253"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019463505","display_name":"Matthew Schormans","orcid":"https://orcid.org/0000-0001-6149-5180"},"institutions":[{"id":"https://openalex.org/I45129253","display_name":"University College London","ror":"https://ror.org/02jx3x895","country_code":"GB","type":"education","lineage":["https://openalex.org/I124357947","https://openalex.org/I45129253"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Matthew Schormans","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, University College London, London, U.K"],"raw_orcid":"https://orcid.org/0000-0001-6149-5180","affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, University College London, London, U.K","institution_ids":["https://openalex.org/I45129253"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044667482","display_name":"Dai Jiang","orcid":"https://orcid.org/0000-0001-9575-8831"},"institutions":[{"id":"https://openalex.org/I45129253","display_name":"University College London","ror":"https://ror.org/02jx3x895","country_code":"GB","type":"education","lineage":["https://openalex.org/I124357947","https://openalex.org/I45129253"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Dai Jiang","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, University College London, London, U.K"],"raw_orcid":"https://orcid.org/0000-0001-9575-8831","affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, University College London, London, U.K","institution_ids":["https://openalex.org/I45129253"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046135832","display_name":"S. Schmitt","orcid":"https://orcid.org/0000-0001-8387-1853"},"institutions":[{"id":"https://openalex.org/I3133415080","display_name":"Fraunhofer Institute for Microengineering and Microsystems","ror":"https://ror.org/00bkxry42","country_code":"DE","type":"facility","lineage":["https://openalex.org/I3133415080","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Stefan Schmitt","raw_affiliation_strings":["Department of Chemistry, Fraunhofer Institute for Microengineering and Microsystems, Mainz, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Chemistry, Fraunhofer Institute for Microengineering and Microsystems, Mainz, Germany","institution_ids":["https://openalex.org/I3133415080"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087156335","display_name":"Peter Detemple","orcid":"https://orcid.org/0009-0007-2407-1259"},"institutions":[{"id":"https://openalex.org/I3133415080","display_name":"Fraunhofer Institute for Microengineering and Microsystems","ror":"https://ror.org/00bkxry42","country_code":"DE","type":"facility","lineage":["https://openalex.org/I3133415080","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Peter Detemple","raw_affiliation_strings":["Department of Chemistry, Fraunhofer Institute for Microengineering and Microsystems, Mainz, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Chemistry, Fraunhofer Institute for Microengineering and Microsystems, Mainz, Germany","institution_ids":["https://openalex.org/I3133415080"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012493816","display_name":"Andreas Demosthenous","orcid":"https://orcid.org/0000-0003-0623-963X"},"institutions":[{"id":"https://openalex.org/I45129253","display_name":"University College London","ror":"https://ror.org/02jx3x895","country_code":"GB","type":"education","lineage":["https://openalex.org/I124357947","https://openalex.org/I45129253"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Andreas Demosthenous","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, University College London, London, U.K"],"raw_orcid":"https://orcid.org/0000-0003-0623-963X","affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, University College London, London, U.K","institution_ids":["https://openalex.org/I45129253"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5005458223"],"corresponding_institution_ids":["https://openalex.org/I45129253"],"apc_list":null,"apc_paid":null,"fwci":0.5542,"has_fulltext":true,"cited_by_count":6,"citation_normalized_percentile":{"value":0.6364108,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"69","issue":"10","first_page":"4168","last_page":"4172"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6935672163963318},{"id":"https://openalex.org/keywords/microelectromechanical-systems","display_name":"Microelectromechanical systems","score":0.5797924399375916},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5567076802253723},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.48567235469818115},{"id":"https://openalex.org/keywords/mesfet","display_name":"MESFET","score":0.4671100378036499},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.444114089012146},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.443158894777298},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4295789301395416},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.42036813497543335},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.41916143894195557},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.41380953788757324},{"id":"https://openalex.org/keywords/phase-detector","display_name":"Phase detector","score":0.411247581243515},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.31918463110923767},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2790922522544861},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.17231595516204834},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.14309459924697876},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.12470105290412903},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12231779098510742}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6935672163963318},{"id":"https://openalex.org/C37977207","wikidata":"https://www.wikidata.org/wiki/Q175561","display_name":"Microelectromechanical systems","level":2,"score":0.5797924399375916},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5567076802253723},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.48567235469818115},{"id":"https://openalex.org/C134123091","wikidata":"https://www.wikidata.org/wiki/Q1837339","display_name":"MESFET","level":5,"score":0.4671100378036499},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.444114089012146},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.443158894777298},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4295789301395416},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.42036813497543335},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.41916143894195557},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.41380953788757324},{"id":"https://openalex.org/C110086884","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase detector","level":3,"score":0.411247581243515},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.31918463110923767},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2790922522544861},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.17231595516204834},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.14309459924697876},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.12470105290412903},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12231779098510742},{"id":"https://openalex.org/C145598152","wikidata":"https://www.wikidata.org/wiki/Q176097","display_name":"Field-effect transistor","level":4,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/tcsii.2022.3190796","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2022.3190796","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},{"id":"pmh:oai:eprints.ucl.ac.uk.OAI2:10152258","is_oa":true,"landing_page_url":"https://discovery.ucl.ac.uk/id/eprint/10152258/","pdf_url":"https://discovery.ucl.ac.uk/10152258/1/An_Implantable_Phase_Locked_Loop_MEMS.pdf","source":{"id":"https://openalex.org/S4306400024","display_name":"UCL Discovery (University College London)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I45129253","host_organization_name":"University College London","host_organization_lineage":["https://openalex.org/I45129253"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"   IEEE Transactions on Circuits and Systems II: Express Briefs       (2022)     (In press).  ","raw_type":"Article"},{"id":"pmh:oai:publica.fraunhofer.de:publica/429483","is_oa":false,"landing_page_url":"https://publica.fraunhofer.de/handle/publica/429483","pdf_url":null,"source":{"id":"https://openalex.org/S4306400318","display_name":"Fraunhofer-Publica (Fraunhofer-Gesellschaft)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4923324","host_organization_name":"Fraunhofer-Gesellschaft","host_organization_lineage":["https://openalex.org/I4923324"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"journal article"}],"best_oa_location":{"id":"pmh:oai:eprints.ucl.ac.uk.OAI2:10152258","is_oa":true,"landing_page_url":"https://discovery.ucl.ac.uk/id/eprint/10152258/","pdf_url":"https://discovery.ucl.ac.uk/10152258/1/An_Implantable_Phase_Locked_Loop_MEMS.pdf","source":{"id":"https://openalex.org/S4306400024","display_name":"UCL Discovery (University College London)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I45129253","host_organization_name":"University College London","host_organization_lineage":["https://openalex.org/I45129253"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"   IEEE Transactions on Circuits and Systems II: Express Briefs       (2022)     (In press).  ","raw_type":"Article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G3048673831","display_name":null,"funder_award_id":"824071","funder_id":"https://openalex.org/F4320320300","funder_display_name":"European Commission"}],"funders":[{"id":"https://openalex.org/F4320320300","display_name":"European Commission","ror":"https://ror.org/00k4n6c32"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4285264342.pdf","grobid_xml":"https://content.openalex.org/works/W4285264342.grobid-xml"},"referenced_works_count":13,"referenced_works":["https://openalex.org/W1566916904","https://openalex.org/W1984863066","https://openalex.org/W2043633993","https://openalex.org/W2059770713","https://openalex.org/W2088779852","https://openalex.org/W2114953806","https://openalex.org/W2324739231","https://openalex.org/W2547640861","https://openalex.org/W2576046880","https://openalex.org/W2602330298","https://openalex.org/W2944488600","https://openalex.org/W2980283066","https://openalex.org/W3161571141"],"related_works":["https://openalex.org/W2295601265","https://openalex.org/W2148370333","https://openalex.org/W2936029881","https://openalex.org/W2096085680","https://openalex.org/W1978946573","https://openalex.org/W2908219865","https://openalex.org/W1153251241","https://openalex.org/W1576501709","https://openalex.org/W1990401855","https://openalex.org/W4381745543"],"abstract_inverted_index":{"An":[0],"implantable":[1],"readout":[2,99],"circuit":[3,40],"using":[4,29],"a":[5,25,44,66,78],"MEMS":[6,103],"pressure":[7],"sensor":[8,75],"has":[9],"been":[10],"designed":[11],"and":[12,34,64],"implemented":[13,42],"to":[14,72,82],"monitor":[15],"the":[16,73,88,95,98,102],"heart":[17,20],"activity":[18],"after":[19],"transplant":[21],"surgery.":[22],"It":[23,54],"features":[24],"time":[26],"domain":[27],"architecture":[28],"two":[30],"identical":[31],"voltage-controlled":[32],"oscillators":[33],"phase":[35],"locked":[36],"loop":[37],"circuits.":[38],"The":[39,85],"was":[41],"in":[43],"65":[45],"nm":[46],"CMOS":[47],"technology":[48],"with":[49,77,101],"1":[50],"V":[51],"power":[52,63],"supply.":[53],"consumes":[55],"<inline-formula":[56],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[57],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[58],"<tex-math":[59],"notation=\"LaTeX\">$100~\\mu":[60],"\\text{W}$":[61],"</tex-math></inline-formula>":[62],"provides":[65],"digital":[67],"output":[68],"that":[69],"is":[70,90],"proportional":[71],"analog":[74],"input":[76],"bandwidth":[79],"of":[80,87,97],"up":[81],"4":[83],"kHz.":[84],"SNR":[86],"system":[89],"53":[91],"dB.":[92],"Measurements":[93],"show":[94],"operation":[96],"chip":[100],"sensor.":[104]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}