{"id":"https://openalex.org/W4285286496","doi":"https://doi.org/10.1109/tcsii.2022.3188428","title":"A 384G Output NonZeros/J Graph Convolutional Neural Network Accelerator","display_name":"A 384G Output NonZeros/J Graph Convolutional Neural Network Accelerator","publication_year":2022,"publication_date":"2022-07-04","ids":{"openalex":"https://openalex.org/W4285286496","doi":"https://doi.org/10.1109/tcsii.2022.3188428"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2022.3188428","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2022.3188428","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5011741776","display_name":"Kyeong-Jun Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kyeong-Jun Lee","raw_affiliation_strings":["Department of Convergence IT Engineering, Pohang University of Science and Technology, Pohang, South Korea"],"raw_orcid":"https://orcid.org/0000-0001-7002-5973","affiliations":[{"raw_affiliation_string":"Department of Convergence IT Engineering, Pohang University of Science and Technology, Pohang, South Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042758402","display_name":"Seunghyun Moon","orcid":"https://orcid.org/0000-0003-0027-2666"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seunghyun Moon","raw_affiliation_strings":["Department of Convergence IT Engineering, Pohang University of Science and Technology, Pohang, South Korea"],"raw_orcid":"https://orcid.org/0000-0003-0027-2666","affiliations":[{"raw_affiliation_string":"Department of Convergence IT Engineering, Pohang University of Science and Technology, Pohang, South Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033088278","display_name":"Jae\u2010Yoon Sim","orcid":"https://orcid.org/0000-0003-1814-6211"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jae-Yoon Sim","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, Pohang University of Science and Technology, Pohang, South Korea"],"raw_orcid":"https://orcid.org/0000-0003-1814-6211","affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, Pohang University of Science and Technology, Pohang, South Korea","institution_ids":["https://openalex.org/I123900574"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I123900574"],"apc_list":null,"apc_paid":null,"fwci":0.3725,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.51857244,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"69","issue":"10","first_page":"4158","last_page":"4162"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9829000234603882,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.7725606560707092},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.6192104816436768},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.588518500328064},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5342475771903992},{"id":"https://openalex.org/keywords/convolutional-neural-network","display_name":"Convolutional neural network","score":0.5048059225082397},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.4944477081298828},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.48876142501831055},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.4315238296985626},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.4270954430103302},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.4184541404247284},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3422582149505615},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.2737353444099426},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.24285510182380676},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.21788018941879272},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.20424452424049377}],"concepts":[{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.7725606560707092},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.6192104816436768},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.588518500328064},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5342475771903992},{"id":"https://openalex.org/C81363708","wikidata":"https://www.wikidata.org/wiki/Q17084460","display_name":"Convolutional neural network","level":2,"score":0.5048059225082397},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.4944477081298828},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.48876142501831055},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.4315238296985626},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.4270954430103302},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.4184541404247284},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3422582149505615},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.2737353444099426},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.24285510182380676},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.21788018941879272},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.20424452424049377},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2022.3188428","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2022.3188428","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[{"id":"https://openalex.org/G2306713339","display_name":null,"funder_award_id":"2019R1A5A1027055","funder_id":"https://openalex.org/F4320328359","funder_display_name":"Ministry of Science and ICT, South Korea"}],"funders":[{"id":"https://openalex.org/F4320320671","display_name":"National Research Foundation","ror":"https://ror.org/05s0g1g46"},{"id":"https://openalex.org/F4320322202","display_name":"IC Design Education Center","ror":"https://ror.org/005v57z85"},{"id":"https://openalex.org/F4320328359","display_name":"Ministry of Science and ICT, South Korea","ror":"https://ror.org/01wpjm123"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W639708223","https://openalex.org/W1536929369","https://openalex.org/W1902237438","https://openalex.org/W2525778437","https://openalex.org/W2945827377","https://openalex.org/W2963037989","https://openalex.org/W3015391117","https://openalex.org/W3016832937","https://openalex.org/W3101553402","https://openalex.org/W3103168911","https://openalex.org/W3105753905","https://openalex.org/W3133635270","https://openalex.org/W3157609068","https://openalex.org/W3206743063","https://openalex.org/W4226137788","https://openalex.org/W4231846589","https://openalex.org/W4251125085","https://openalex.org/W6632100814","https://openalex.org/W6681885597","https://openalex.org/W6726873649","https://openalex.org/W6727690538","https://openalex.org/W6748848838"],"related_works":["https://openalex.org/W2293118914","https://openalex.org/W2998381397","https://openalex.org/W4236419692","https://openalex.org/W2171015181","https://openalex.org/W3167919718","https://openalex.org/W4251718783","https://openalex.org/W2999668243","https://openalex.org/W1485756991","https://openalex.org/W2376218453","https://openalex.org/W2984236338"],"abstract_inverted_index":{"This":[0],"brief":[1],"presents":[2],"the":[3,33,41,60,66,76,92,107],"first":[4],"IC":[5],"implementation":[6,96],"of":[7,23,36,43,46,65,80,91],"graph":[8,78],"convolutional":[9],"neural":[10],"network":[11],"(GCN)":[12],"accelerator":[13,51],"chip.":[14],"A":[15],"sparsity":[16],"aware":[17],"dataflow":[18],"optimized":[19],"for":[20,59,75],"sub-block-wise":[21],"processing":[22],"three":[24],"different":[25],"matrices":[26],"in":[27,52,89],"GCN":[28],"is":[29],"proposed":[30,93],"to":[31,106],"improve":[32],"utilization":[34],"ratio":[35],"computing":[37],"resources":[38],"while":[39],"reducing":[40],"amount":[42],"redundant":[44],"access":[45],"off-chip":[47],"memory.":[48],"The":[49,86],"implemented":[50],"28-nm":[53],"CMOS":[54],"produces":[55],"384G":[56],"NZ":[57],"outputs/J":[58],"extremely":[61],"sparse":[62],"matrix":[63],"multiplications":[64],"GCN.":[67],"It":[68],"shows":[69,97],"58k-to-143k,":[70],"38k-to-92k":[71],"and":[72,83,112],"5k-to-13k":[73],"Graph/J":[74,90],"benchmark":[77],"datasets":[79],"Cora,":[81],"Citeseer":[82],"Pubmed,":[84],"respectively.":[85,116],"energy":[87],"efficiency":[88],"16b":[94],"ASIC":[95],"about":[98],"4-to-$11\\mathbf":[99],"{\\times":[100,103],"}$and":[101],"8-to-$25\\mathbf":[102],"}$improvements":[104],"compared":[105],"previously":[108],"reported":[109],"8b":[110],"FPGA":[111,114],"32b":[113],"implementations,":[115]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}