{"id":"https://openalex.org/W4285159546","doi":"https://doi.org/10.1109/tcsii.2022.3183169","title":"A Three-Stage Amplifier With Cascode Miller Compensation and Buffered Asymmetric Dual Path for Driving Large Capacitive Loads","display_name":"A Three-Stage Amplifier With Cascode Miller Compensation and Buffered Asymmetric Dual Path for Driving Large Capacitive Loads","publication_year":2022,"publication_date":"2022-06-14","ids":{"openalex":"https://openalex.org/W4285159546","doi":"https://doi.org/10.1109/tcsii.2022.3183169"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2022.3183169","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2022.3183169","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072859886","display_name":"Yaowen Tu","orcid":"https://orcid.org/0000-0001-9991-8548"},"institutions":[{"id":"https://openalex.org/I4210138186","display_name":"Wuhan National Laboratory for Optoelectronics","ror":"https://ror.org/03c9ncn37","country_code":"CN","type":"facility","lineage":["https://openalex.org/I4210138186"]},{"id":"https://openalex.org/I47720641","display_name":"Huazhong University of Science and Technology","ror":"https://ror.org/00p991c53","country_code":"CN","type":"education","lineage":["https://openalex.org/I47720641"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yaowen Tu","raw_affiliation_strings":["Wuhan National Laboratory for Optoelectronics and the School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, China"],"raw_orcid":"https://orcid.org/0000-0001-9991-8548","affiliations":[{"raw_affiliation_string":"Wuhan National Laboratory for Optoelectronics and the School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, China","institution_ids":["https://openalex.org/I4210138186","https://openalex.org/I47720641"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5047005756","display_name":"Min Tan","orcid":"https://orcid.org/0000-0002-5531-6198"},"institutions":[{"id":"https://openalex.org/I4210138186","display_name":"Wuhan National Laboratory for Optoelectronics","ror":"https://ror.org/03c9ncn37","country_code":"CN","type":"facility","lineage":["https://openalex.org/I4210138186"]},{"id":"https://openalex.org/I47720641","display_name":"Huazhong University of Science and Technology","ror":"https://ror.org/00p991c53","country_code":"CN","type":"education","lineage":["https://openalex.org/I47720641"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Min Tan","raw_affiliation_strings":["Wuhan National Laboratory for Optoelectronics and the School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, China"],"raw_orcid":"https://orcid.org/0000-0002-5531-6198","affiliations":[{"raw_affiliation_string":"Wuhan National Laboratory for Optoelectronics and the School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, China","institution_ids":["https://openalex.org/I4210138186","https://openalex.org/I47720641"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3967,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.52674944,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"69","issue":"11","first_page":"4198","last_page":"4202"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9940000176429749,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/capacitive-sensing","display_name":"Capacitive sensing","score":0.5448900461196899},{"id":"https://openalex.org/keywords/notation","display_name":"Notation","score":0.4871515929698944},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.4676223397254944},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.42106401920318604},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.4129892587661743},{"id":"https://openalex.org/keywords/multiplicative-function","display_name":"Multiplicative function","score":0.4127099812030792},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.39657631516456604},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3827595114707947},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.36430326104164124},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.33662232756614685},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.2907218039035797},{"id":"https://openalex.org/keywords/combinatorics","display_name":"Combinatorics","score":0.2680053114891052},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22517922520637512},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.19033455848693848},{"id":"https://openalex.org/keywords/mathematical-analysis","display_name":"Mathematical analysis","score":0.15380939841270447}],"concepts":[{"id":"https://openalex.org/C206755178","wikidata":"https://www.wikidata.org/wiki/Q1131271","display_name":"Capacitive sensing","level":2,"score":0.5448900461196899},{"id":"https://openalex.org/C45357846","wikidata":"https://www.wikidata.org/wiki/Q2001982","display_name":"Notation","level":2,"score":0.4871515929698944},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.4676223397254944},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.42106401920318604},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.4129892587661743},{"id":"https://openalex.org/C42747912","wikidata":"https://www.wikidata.org/wiki/Q1048447","display_name":"Multiplicative function","level":2,"score":0.4127099812030792},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.39657631516456604},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3827595114707947},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.36430326104164124},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.33662232756614685},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.2907218039035797},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.2680053114891052},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22517922520637512},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.19033455848693848},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.15380939841270447},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2022.3183169","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2022.3183169","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.800000011920929,"id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G3519137026","display_name":null,"funder_award_id":"2018YFA0704400","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1536945048","https://openalex.org/W2004391179","https://openalex.org/W2058816094","https://openalex.org/W2081968211","https://openalex.org/W2162599988","https://openalex.org/W2515657071","https://openalex.org/W2551453206","https://openalex.org/W3097724638"],"related_works":["https://openalex.org/W3102847316","https://openalex.org/W2504004674","https://openalex.org/W4318195686","https://openalex.org/W4251867247","https://openalex.org/W2975999359","https://openalex.org/W1987679298","https://openalex.org/W2963177394","https://openalex.org/W4313359513","https://openalex.org/W3172386668","https://openalex.org/W2291633415"],"abstract_inverted_index":{"In":[0],"this":[1],"brief,":[2],"we":[3],"combine":[4],"a":[5,20,33,81],"buffered":[6],"asymmetric":[7],"dual-path":[8],"structure":[9],"with":[10,38,80],"cascode":[11],"Miller":[12],"compensation":[13],"to":[14],"extend":[15],"the":[16],"unity-gain":[17],"bandwidth":[18],"of":[19],"three-stage":[21],"amplifier":[22],"while":[23],"decreasing":[24],"its":[25],"power":[26,52],"consumption.":[27,53],"This":[28],"design":[29],"is":[30],"implemented":[31],"in":[32],"65":[34],"nm":[35],"CMOS":[36],"technology":[37],"0.0017":[39],"mm2":[40],"chip":[41],"area":[42],"and":[43,69],"6.62":[44],"<inline-formula":[45,57,72],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[46,58,73],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[47,59,74],"<tex-math":[48,60,75],"notation=\"LaTeX\">${\\mu":[49,76],"}\\text{W}$":[50],"</tex-math></inline-formula>":[51,62,78],"Post-simulation":[54],"results":[55],"achieve":[56],"notation=\"LaTeX\">${&gt;}100$":[61],"dB":[63],"DC":[64],"gain,":[65],"1.20":[66],"MHz":[67],"UGB,":[68],"0.391":[70],"V/":[71],"}\\text{s}$":[77],"SR":[79],"1.5":[82],"nF":[83],"load":[84],"capacitor.":[85]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}