{"id":"https://openalex.org/W4285245015","doi":"https://doi.org/10.1109/tcsii.2022.3177885","title":"A 2.5\u20135.0-GHz Clock Multiplier With 3.2\u20134.5-mUI<sub>rms</sub> Jitter and 0.98\u20131.06 mW/GHz in 65-nm CMOS","display_name":"A 2.5\u20135.0-GHz Clock Multiplier With 3.2\u20134.5-mUI<sub>rms</sub> Jitter and 0.98\u20131.06 mW/GHz in 65-nm CMOS","publication_year":2022,"publication_date":"2022-05-25","ids":{"openalex":"https://openalex.org/W4285245015","doi":"https://doi.org/10.1109/tcsii.2022.3177885"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2022.3177885","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2022.3177885","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5073990199","display_name":"Jaya Deepthi Bandarupalli","orcid":null},"institutions":[{"id":"https://openalex.org/I24676775","display_name":"Indian Institute of Technology Madras","ror":"https://ror.org/03v0r5n49","country_code":"IN","type":"facility","lineage":["https://openalex.org/I24676775"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Jaya Deepthi Bandarupalli","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Madras, Chennai, India"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Madras, Chennai, India","institution_ids":["https://openalex.org/I24676775"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5014971774","display_name":"Saurabh Saxena","orcid":"https://orcid.org/0000-0001-5592-054X"},"institutions":[{"id":"https://openalex.org/I24676775","display_name":"Indian Institute of Technology Madras","ror":"https://ror.org/03v0r5n49","country_code":"IN","type":"facility","lineage":["https://openalex.org/I24676775"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Saurabh Saxena","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Madras, Chennai, India"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Madras, Chennai, India","institution_ids":["https://openalex.org/I24676775"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5073990199"],"corresponding_institution_ids":["https://openalex.org/I24676775"],"apc_list":null,"apc_paid":null,"fwci":0.092,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.39529614,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"69","issue":"9","first_page":"3714","last_page":"3718"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cpu-multiplier","display_name":"CPU multiplier","score":0.8340274095535278},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.7991231679916382},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.6262214779853821},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.5960467457771301},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5903754234313965},{"id":"https://openalex.org/keywords/frequency-multiplier","display_name":"Frequency multiplier","score":0.49555742740631104},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.46783319115638733},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.3862125873565674},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.34293246269226074},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.32971665263175964},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.322619765996933},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2001468539237976}],"concepts":[{"id":"https://openalex.org/C125576049","wikidata":"https://www.wikidata.org/wiki/Q2246273","display_name":"CPU multiplier","level":5,"score":0.8340274095535278},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.7991231679916382},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.6262214779853821},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.5960467457771301},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5903754234313965},{"id":"https://openalex.org/C146002875","wikidata":"https://www.wikidata.org/wiki/Q1074289","display_name":"Frequency multiplier","level":3,"score":0.49555742740631104},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.46783319115638733},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.3862125873565674},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.34293246269226074},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.32971665263175964},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.322619765996933},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2001468539237976},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2022.3177885","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2022.3177885","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.9200000166893005,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W2069335439","https://openalex.org/W2072937223","https://openalex.org/W2100957399","https://openalex.org/W2134807578","https://openalex.org/W2142629786","https://openalex.org/W2410273639","https://openalex.org/W2462522525","https://openalex.org/W2791924879","https://openalex.org/W2794441083","https://openalex.org/W2805233971","https://openalex.org/W2946097807"],"related_works":["https://openalex.org/W2090237663","https://openalex.org/W2052455055","https://openalex.org/W4386968318","https://openalex.org/W2001020839","https://openalex.org/W2114711633","https://openalex.org/W1995486566","https://openalex.org/W2031867410","https://openalex.org/W2377552037","https://openalex.org/W4321517886","https://openalex.org/W1526416583"],"abstract_inverted_index":{"We":[0],"present":[1],"a":[2,22,35,48,57],"two-stage":[3,116],"cascaded":[4],"clock":[5,18,37,41,45,63,70,94,117],"multiplier":[6,19,46,95,118],"with":[7,47,89,136],"roughly":[8],"constant":[9],"energy":[10],"consumption":[11],"across":[12,107,131],"2.5-5.0GHz":[13],"frequency":[14,49,109,135],"range.":[15],"The":[16,62,115],"proposed":[17],"consists":[20],"of":[21],"reconfigurable":[23],"delay-locked":[24],"loop":[25,51],"and":[26,77,87],"edge":[27],"combiner":[28],"in":[29,52,73,82],"the":[30,53,69,74,92,120],"first":[31],"stage":[32,55],"while":[33],"generating":[34],"156.25-312.5MHz":[36,108],"from":[38],"39.0625MHz":[39],"reference":[40],"frequency.":[42],"An":[43],"injection-locked":[44],"tracking":[50],"second":[54],"implements":[56],"2.5-5.0":[58,132],"GHz":[59,133],"output":[60,122,134],"clock.":[61],"generation":[64],"architecture":[65],"is":[66],"optimized":[67],"for":[68],"multiplication":[71],"ratio":[72],"two":[75],"stages":[76],"overall":[78],"power":[79,113,138],"consumption.":[80,114],"Designed":[81],"TSMC":[83],"65nm":[84],"CMOS":[85],"process":[86],"characterized":[88],"post-layout":[90],"simulations,":[91],"first-stage":[93],"achieves":[96],"an":[97],"integrated":[98],"jitter":[99,123],"1.396-0.607ps":[100],"<inline-formula":[101,125],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[102,126],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[103,127],"<tex-math":[104,128],"notation=\"LaTeX\">$_{rms}$":[105,129],"</tex-math></inline-formula>":[106,130],"range":[110],"at":[111],"1.15-2.82mW":[112],"gives":[119],"total":[121],"1.5-0.9ps":[124],"0.98-1.06mW/GHz":[137],"dissipation.":[139]},"counts_by_year":[{"year":2024,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}