{"id":"https://openalex.org/W3209943923","doi":"https://doi.org/10.1109/tcsii.2021.3123558","title":"Asymmetric Crosstalk Harnessed Signaling for Large 3D Routing Integration","display_name":"Asymmetric Crosstalk Harnessed Signaling for Large 3D Routing Integration","publication_year":2021,"publication_date":"2021-10-28","ids":{"openalex":"https://openalex.org/W3209943923","doi":"https://doi.org/10.1109/tcsii.2021.3123558","mag":"3209943923"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2021.3123558","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2021.3123558","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5033073973","display_name":"Daniel Iparraguirre","orcid":"https://orcid.org/0000-0001-8968-3204"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I72951846","display_name":"Washington State University","ror":"https://ror.org/05dk0ce17","country_code":"US","type":"education","lineage":["https://openalex.org/I72951846"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Daniel Iparraguirre","raw_affiliation_strings":["School of Electrical Engineering and Computer Science, Washington State University, Pullman, WA, USA","Enterprise Platform Signal Integrity (EPSI), Intel Corporation, Santa Clara, CA, USA"],"raw_orcid":"https://orcid.org/0000-0001-8968-3204","affiliations":[{"raw_affiliation_string":"School of Electrical Engineering and Computer Science, Washington State University, Pullman, WA, USA","institution_ids":["https://openalex.org/I72951846"]},{"raw_affiliation_string":"Enterprise Platform Signal Integrity (EPSI), Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5057615824","display_name":"J.G. Delgado-Frias","orcid":"https://orcid.org/0000-0002-7026-9991"},"institutions":[{"id":"https://openalex.org/I72951846","display_name":"Washington State University","ror":"https://ror.org/05dk0ce17","country_code":"US","type":"education","lineage":["https://openalex.org/I72951846"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jose G. Delgado-Frias","raw_affiliation_strings":["School of Electrical Engineering and Computer Science, Washington State University, Pullman, WA, USA"],"raw_orcid":"https://orcid.org/0000-0002-7026-9991","affiliations":[{"raw_affiliation_string":"School of Electrical Engineering and Computer Science, Washington State University, Pullman, WA, USA","institution_ids":["https://openalex.org/I72951846"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1967,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.50824895,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"69","issue":"3","first_page":"1059","last_page":"1063"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/crosstalk","display_name":"Crosstalk","score":0.8589087128639221},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5150501728057861},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.4904799163341522},{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.45083701610565186},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3823603391647339},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.3376939594745636},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.31487786769866943},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25786179304122925},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.17666301131248474}],"concepts":[{"id":"https://openalex.org/C169822122","wikidata":"https://www.wikidata.org/wiki/Q230187","display_name":"Crosstalk","level":2,"score":0.8589087128639221},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5150501728057861},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.4904799163341522},{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.45083701610565186},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3823603391647339},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.3376939594745636},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.31487786769866943},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25786179304122925},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.17666301131248474}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2021.3123558","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2021.3123558","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W10143836","https://openalex.org/W1576567199","https://openalex.org/W2159306950","https://openalex.org/W2770600390","https://openalex.org/W2806937950","https://openalex.org/W2884740154","https://openalex.org/W3047785674","https://openalex.org/W3128700355","https://openalex.org/W3159384954","https://openalex.org/W4252622386","https://openalex.org/W6958889824"],"related_works":["https://openalex.org/W2289987414","https://openalex.org/W2386114299","https://openalex.org/W2347291799","https://openalex.org/W2027050626","https://openalex.org/W2544382002","https://openalex.org/W2949851887","https://openalex.org/W2108950548","https://openalex.org/W4404996597","https://openalex.org/W4321844105","https://openalex.org/W2545693558"],"abstract_inverted_index":{"This":[0],"brief":[1],"presents":[2],"a":[3,48,55,68,73,90],"high":[4,29],"level":[5],"of":[6,98],"integration":[7],"for":[8,118],"parallel":[9],"source-synchronous":[10],"interfaces":[11],"using":[12,82],"Asymmetric":[13],"Crosstalk":[14,42],"Harnessed":[15,43],"Signaling":[16,44],"(ACHS)":[17],"on":[18],"3D":[19,69],"routing":[20,50,70,85],"environments.":[21],"ACHS":[22,78,88],"is":[23,59],"shown":[24],"to":[25,33,95,109,113],"successfully":[26],"overcome":[27],"the":[28,34,40,83,96,99,110],"noise":[30],"susceptibility":[31],"related":[32],"common":[35,100],"encoding":[36,101,112],"eigenmode":[37],"present":[38],"in":[39,67],"original":[41],"(CHS)":[45],"scheme,":[46],"with":[47],"small":[49],"overhead.":[51],"In":[52],"this":[53,119],"brief,":[54],"bus":[56],"design":[57],"case":[58],"presented":[60],"where":[61],"multiple":[62],"channels":[63],"are":[64,80,107],"wired":[65],"together":[66],"environment":[71],"by":[72],"multi-stripline":[74],"stackup.":[75],"CHS":[76],"and":[77],"performances":[79],"compared":[81],"same":[84],"real-estate":[86],"availability;":[87],"shows":[89],"far":[91],"superior":[92],"performance":[93],"due":[94],"absence":[97],"mode.":[102],"The":[103],"best":[104],"performing":[105],"eigenmodes":[106],"applied":[108],"strobe":[111],"achieve":[114],"very":[115],"good":[116],"integrity":[117],"critical":[120],"signal.":[121]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}