{"id":"https://openalex.org/W3197051289","doi":"https://doi.org/10.1109/tcsii.2021.3110409","title":"A Clock Distribution Scheme Insensitive to Supply Voltage Drift With Self-Adjustment of Clock Buffer Delay","display_name":"A Clock Distribution Scheme Insensitive to Supply Voltage Drift With Self-Adjustment of Clock Buffer Delay","publication_year":2021,"publication_date":"2021-09-06","ids":{"openalex":"https://openalex.org/W3197051289","doi":"https://doi.org/10.1109/tcsii.2021.3110409","mag":"3197051289"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2021.3110409","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2021.3110409","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037536146","display_name":"Soyeong Shin","orcid":"https://orcid.org/0000-0002-6439-4825"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]},{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Soyeong Shin","raw_affiliation_strings":["Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center, Seoul National University, Seoul, South Korea","DRAM Interface Design, Samsung Electronics, Hwaseong, South Korea"],"raw_orcid":"https://orcid.org/0000-0002-6439-4825","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"DRAM Interface Design, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100366473","display_name":"Yongjae Lee","orcid":"https://orcid.org/0000-0001-8285-1527"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Yongjae Lee","raw_affiliation_strings":["Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center, Seoul National University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0001-8285-1527","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056576795","display_name":"Jiheon Park","orcid":"https://orcid.org/0000-0002-7649-6415"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jiheon Park","raw_affiliation_strings":["System LSI, Samsung Electronics, Hwaseong, South Korea"],"raw_orcid":"https://orcid.org/0000-0002-7649-6415","affiliations":[{"raw_affiliation_string":"System LSI, Samsung Electronics, Hwaseong, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023434608","display_name":"Ji-Hyo Kang","orcid":"https://orcid.org/0000-0003-1921-8037"},"institutions":[{"id":"https://openalex.org/I134353371","display_name":"SK Group (South Korea)","ror":"https://ror.org/03696td91","country_code":"KR","type":"company","lineage":["https://openalex.org/I134353371"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Ji-Hyo Kang","raw_affiliation_strings":["SK Hynix, Icheon, South Korea"],"raw_orcid":"https://orcid.org/0000-0003-1921-8037","affiliations":[{"raw_affiliation_string":"SK Hynix, Icheon, South Korea","institution_ids":["https://openalex.org/I134353371"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101709144","display_name":"Kyunghoon Kim","orcid":"https://orcid.org/0000-0003-4316-9327"},"institutions":[{"id":"https://openalex.org/I134353371","display_name":"SK Group (South Korea)","ror":"https://ror.org/03696td91","country_code":"KR","type":"company","lineage":["https://openalex.org/I134353371"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kyunghoon Kim","raw_affiliation_strings":["SK Hynix, Icheon, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"SK Hynix, Icheon, South Korea","institution_ids":["https://openalex.org/I134353371"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074082712","display_name":"Daehan Kwon","orcid":"https://orcid.org/0000-0002-2033-8928"},"institutions":[{"id":"https://openalex.org/I134353371","display_name":"SK Group (South Korea)","ror":"https://ror.org/03696td91","country_code":"KR","type":"company","lineage":["https://openalex.org/I134353371"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Dae-Han Kwon","raw_affiliation_strings":["SK Hynix, Icheon, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"SK Hynix, Icheon, South Korea","institution_ids":["https://openalex.org/I134353371"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100634550","display_name":"Sangkwon Lee","orcid":"https://orcid.org/0000-0001-7338-1316"},"institutions":[{"id":"https://openalex.org/I134353371","display_name":"SK Group (South Korea)","ror":"https://ror.org/03696td91","country_code":"KR","type":"company","lineage":["https://openalex.org/I134353371"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sangkwon Lee","raw_affiliation_strings":["SK Hynix, Icheon, South Korea"],"raw_orcid":"https://orcid.org/0000-0001-7338-1316","affiliations":[{"raw_affiliation_string":"SK Hynix, Icheon, South Korea","institution_ids":["https://openalex.org/I134353371"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065437579","display_name":"Jieun Jang","orcid":"https://orcid.org/0000-0003-0224-6154"},"institutions":[{"id":"https://openalex.org/I134353371","display_name":"SK Group (South Korea)","ror":"https://ror.org/03696td91","country_code":"KR","type":"company","lineage":["https://openalex.org/I134353371"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jieun Jang","raw_affiliation_strings":["SK Hynix, Icheon, South Korea"],"raw_orcid":"https://orcid.org/0000-0003-0224-6154","affiliations":[{"raw_affiliation_string":"SK Hynix, Icheon, South Korea","institution_ids":["https://openalex.org/I134353371"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002688568","display_name":"Joohwan Cho","orcid":null},"institutions":[{"id":"https://openalex.org/I134353371","display_name":"SK Group (South Korea)","ror":"https://ror.org/03696td91","country_code":"KR","type":"company","lineage":["https://openalex.org/I134353371"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Joo-Hwan Cho","raw_affiliation_strings":["SK Hynix, Icheon, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"SK Hynix, Icheon, South Korea","institution_ids":["https://openalex.org/I134353371"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008010401","display_name":"Deog\u2010Kyoon Jeong","orcid":"https://orcid.org/0000-0003-0436-703X"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Deog-Kyoon Jeong","raw_affiliation_strings":["Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center, Seoul National University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0003-0436-703X","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":10,"corresponding_author_ids":["https://openalex.org/A5037536146"],"corresponding_institution_ids":["https://openalex.org/I139264467","https://openalex.org/I2250650973"],"apc_list":null,"apc_paid":null,"fwci":0.4067,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.61102622,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"69","issue":"3","first_page":"814","last_page":"818"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7848596572875977},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.695514976978302},{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.5552847385406494},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5301120281219482},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4869455099105835},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.47841864824295044},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.39449843764305115},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.38660287857055664},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.32112643122673035},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20451906323432922},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.15270251035690308}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7848596572875977},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.695514976978302},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.5552847385406494},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5301120281219482},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4869455099105835},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.47841864824295044},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.39449843764305115},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.38660287857055664},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.32112643122673035},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20451906323432922},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.15270251035690308}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2021.3110409","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2021.3110409","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8299999833106995}],"awards":[],"funders":[{"id":"https://openalex.org/F4320317879","display_name":"SK Hynix","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1825533673","https://openalex.org/W2038027628","https://openalex.org/W2103806711","https://openalex.org/W2118616136","https://openalex.org/W2134067926","https://openalex.org/W2139132358","https://openalex.org/W2172018329","https://openalex.org/W2914744205","https://openalex.org/W2992657219"],"related_works":["https://openalex.org/W2121182846","https://openalex.org/W2155789024","https://openalex.org/W2315668284","https://openalex.org/W3213608175","https://openalex.org/W2109491806","https://openalex.org/W2369998856","https://openalex.org/W1969806930","https://openalex.org/W2002107209","https://openalex.org/W1967032492","https://openalex.org/W2159683034"],"abstract_inverted_index":{"In":[0,54],"this":[1],"brief,":[2],"a":[3,36,43,109,157],"clock":[4,19,31,103,171,177],"distribution":[5,32,104],"scheme":[6,131],"insensitive":[7],"to":[8,72,88,143],"supply":[9,25,76,90,152],"voltage":[10,26,77,91,153],"drift":[11,92],"is":[12,33,106,154,172],"proposed":[13,56,102,130],"that":[14,128],"minimizes":[15],"variation":[16],"of":[17,35,118,160,180],"the":[18,24,29,51,55,60,75,89,97,129,133,150,161,176],"propagation":[20],"delay":[21,47,94],"caused":[22],"by":[23,156],"change.":[27],"While":[28],"overall":[30],"composed":[34],"current":[37],"mode":[38],"logic":[39],"(CML)":[40],"path":[41,62,105,178],"and":[42,68,99],"CMOS":[44,52,61,112],"path,":[45],"most":[46],"variations":[48],"occur":[49],"in":[50,59,86,96,108],"path.":[53],"scheme,":[57],"delays":[58],"such":[63],"as":[64],"CML-to-CMOS":[65],"converter":[66],"(C2C)":[67],"inverters,":[69],"are":[70],"adjusted":[71],"compensate":[73],"for":[74,93],"drift.":[78],"The":[79,101],"bias":[80,84],"generator":[81],"provides":[82],"self-generated":[83],"voltages":[85],"response":[87],"adjustment":[95],"C2C":[98],"inverters.":[100],"fabricated":[107],"40":[110],"nm":[111],"process":[113],"with":[114,168],"an":[115],"active":[116],"area":[117],"0.004":[119],"mm":[120],"<sup":[121],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[122,141,147],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[123],".":[124],"Measured":[125],"results":[126],"show":[127],"reduces":[132],"root-mean-square":[134],"(RMS)":[135],"jitter":[136],"from":[137],"3.97":[138],"ps":[139,145],"<sub":[140,146],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">RMS</sub>":[142,148],"1.62":[144],"when":[149],"1.1-V":[151],"modulated":[155],"sinusoidal":[158],"wave":[159],"10-MHz,":[162],"100-mV":[163],"peak-to-peak":[164],"swing.":[165],"Power":[166],"consumption":[167],"differential":[169],"6-GHz":[170],"11.02":[173],"mW":[174],"over":[175],"distance":[179],"0.4":[181],"mm.":[182]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":3}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}
