{"id":"https://openalex.org/W3171238903","doi":"https://doi.org/10.1109/tcsii.2021.3089914","title":"Alias Rejection in CT Delta-Sigma ADCs Using Virtual-Ground-Switched Resistor Feedback","display_name":"Alias Rejection in CT Delta-Sigma ADCs Using Virtual-Ground-Switched Resistor Feedback","publication_year":2021,"publication_date":"2021-06-16","ids":{"openalex":"https://openalex.org/W3171238903","doi":"https://doi.org/10.1109/tcsii.2021.3089914","mag":"3171238903"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2021.3089914","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2021.3089914","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083443399","display_name":"Raviteja Theertham","orcid":"https://orcid.org/0000-0003-1131-4972"},"institutions":[{"id":"https://openalex.org/I24676775","display_name":"Indian Institute of Technology Madras","ror":"https://ror.org/03v0r5n49","country_code":"IN","type":"education","lineage":["https://openalex.org/I24676775"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Raviteja Theertham","raw_affiliation_strings":["Department of Electrical Engineering, IIT Madras, Chennai, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, IIT Madras, Chennai, India","institution_ids":["https://openalex.org/I24676775"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5056930703","display_name":"Shanthi Pavan","orcid":"https://orcid.org/0000-0002-6938-8491"},"institutions":[{"id":"https://openalex.org/I24676775","display_name":"Indian Institute of Technology Madras","ror":"https://ror.org/03v0r5n49","country_code":"IN","type":"education","lineage":["https://openalex.org/I24676775"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Shanthi Pavan","raw_affiliation_strings":["Department of Electrical Engineering, IIT Madras, Chennai, India"],"raw_orcid":"https://orcid.org/0000-0002-6938-8491","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, IIT Madras, Chennai, India","institution_ids":["https://openalex.org/I24676775"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I24676775"],"apc_list":null,"apc_paid":null,"fwci":0.2482,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.48032336,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":"69","issue":"4","first_page":"1991","last_page":"1995"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/alias","display_name":"Alias","score":0.8364804983139038},{"id":"https://openalex.org/keywords/resistor","display_name":"Resistor","score":0.7264077663421631},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6408595442771912},{"id":"https://openalex.org/keywords/delta-sigma-modulation","display_name":"Delta-sigma modulation","score":0.5984634160995483},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5415424108505249},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.3676757216453552},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.28878313302993774},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24053603410720825}],"concepts":[{"id":"https://openalex.org/C46681722","wikidata":"https://www.wikidata.org/wiki/Q4725589","display_name":"Alias","level":2,"score":0.8364804983139038},{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.7264077663421631},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6408595442771912},{"id":"https://openalex.org/C68754193","wikidata":"https://www.wikidata.org/wiki/Q1184820","display_name":"Delta-sigma modulation","level":3,"score":0.5984634160995483},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5415424108505249},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.3676757216453552},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.28878313302993774},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24053603410720825},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2021.3089914","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2021.3089914","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W605564925","https://openalex.org/W2050330628","https://openalex.org/W2737760061","https://openalex.org/W2898762003","https://openalex.org/W2966871370","https://openalex.org/W2997311195","https://openalex.org/W3014244138","https://openalex.org/W3016111971","https://openalex.org/W3019579921"],"related_works":["https://openalex.org/W4385605198","https://openalex.org/W2151266859","https://openalex.org/W2056017980","https://openalex.org/W2333004434","https://openalex.org/W4256550813","https://openalex.org/W4400966522","https://openalex.org/W1557487237","https://openalex.org/W2109445684","https://openalex.org/W2081082331","https://openalex.org/W1482165582"],"abstract_inverted_index":{"High-resolution":[0],"continuous-time":[1],"delta-sigma":[2],"modulators":[3],"use":[4],"resistive":[5],"feedback":[6],"DACs":[7,12],"for":[8],"low-noise":[9],"operation.":[10],"Such":[11],"have":[13],"conventionally":[14],"been":[15],"switched":[16],"at":[17],"the":[18,28,39,45,48,53,58],"reference":[19],"end.":[20],"It":[21],"turns":[22],"out":[23],"that":[24],"reference-path":[25],"resistance":[26],"degrades":[27,50],"performance":[29],"of":[30,52,60],"these":[31],"DACs.":[32],"This":[33,55],"problem":[34],"can":[35],"be":[36],"addressed":[37],"by":[38,74],"virtual-ground-switched":[40],"resistor":[41],"DAC.":[42],"However,":[43],"moving":[44],"switches":[46],"to":[47,66,93],"virtual-ground-side":[49],"alias-rejection":[51],"modulator.":[54],"brief":[56],"analyzes":[57],"mechanism":[59],"degradation":[61],"and":[62,76,97],"develops":[63],"a":[64,79,84,91],"model":[65],"estimate":[67],"alias":[68],"rejection.":[69],"Our":[70],"theory":[71],"is":[72],"supported":[73],"simulations":[75],"measurements":[77],"from":[78],"prototype":[80],"modulator":[81],"designed":[82],"in":[83],"180nm":[85],"CMOS":[86],"process.":[87],"We":[88],"then":[89],"describe":[90],"way":[92],"address":[94],"this":[95],"problem,":[96],"demonstrate":[98],"its":[99],"efficacy":[100],"using":[101],"layout-extracted":[102],"simulations.":[103]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}