{"id":"https://openalex.org/W3118042588","doi":"https://doi.org/10.1109/tcsii.2020.3047464","title":"28nm FDSOI Ultra Low Power 1.5\u20132.0 GHz Factorial-DLL Frequency Synthesizer","display_name":"28nm FDSOI Ultra Low Power 1.5\u20132.0 GHz Factorial-DLL Frequency Synthesizer","publication_year":2020,"publication_date":"2020-12-25","ids":{"openalex":"https://openalex.org/W3118042588","doi":"https://doi.org/10.1109/tcsii.2020.3047464","mag":"3118042588"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2020.3047464","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2020.3047464","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084416962","display_name":"Andres Asprilla","orcid":"https://orcid.org/0000-0003-2592-0148"},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I15057530","display_name":"Universit\u00e9 de Bordeaux","ror":"https://ror.org/057qpr032","country_code":"FR","type":"education","lineage":["https://openalex.org/I15057530"]},{"id":"https://openalex.org/I4210157089","display_name":"Laboratoire de l'Int\u00e9gration du Mat\u00e9riau au Syst\u00e8me","ror":"https://ror.org/04nabhy78","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210091158","https://openalex.org/I4210095849","https://openalex.org/I4210157089","https://openalex.org/I4210160189"]},{"id":"https://openalex.org/I4210160189","display_name":"Institut Polytechnique de Bordeaux","ror":"https://ror.org/054qv7y42","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Andres Asprilla","raw_affiliation_strings":["University Bordeaux, Bordeaux INP, UMR CNRS 5218, IMS Laboratory, Talence, France"],"raw_orcid":"https://orcid.org/0000-0003-2592-0148","affiliations":[{"raw_affiliation_string":"University Bordeaux, Bordeaux INP, UMR CNRS 5218, IMS Laboratory, Talence, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210157089","https://openalex.org/I4210160189"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030071078","display_name":"David Cordova","orcid":"https://orcid.org/0000-0003-1471-0436"},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I15057530","display_name":"Universit\u00e9 de Bordeaux","ror":"https://ror.org/057qpr032","country_code":"FR","type":"education","lineage":["https://openalex.org/I15057530"]},{"id":"https://openalex.org/I4210157089","display_name":"Laboratoire de l'Int\u00e9gration du Mat\u00e9riau au Syst\u00e8me","ror":"https://ror.org/04nabhy78","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210091158","https://openalex.org/I4210095849","https://openalex.org/I4210157089","https://openalex.org/I4210160189"]},{"id":"https://openalex.org/I4210160189","display_name":"Institut Polytechnique de Bordeaux","ror":"https://ror.org/054qv7y42","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"David Cordova","raw_affiliation_strings":["University Bordeaux, Bordeaux INP, UMR CNRS 5218, IMS Laboratory, Talence, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University Bordeaux, Bordeaux INP, UMR CNRS 5218, IMS Laboratory, Talence, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210157089","https://openalex.org/I4210160189"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068662659","display_name":"Yann Deval","orcid":"https://orcid.org/0000-0002-7358-8904"},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I15057530","display_name":"Universit\u00e9 de Bordeaux","ror":"https://ror.org/057qpr032","country_code":"FR","type":"education","lineage":["https://openalex.org/I15057530"]},{"id":"https://openalex.org/I4210157089","display_name":"Laboratoire de l'Int\u00e9gration du Mat\u00e9riau au Syst\u00e8me","ror":"https://ror.org/04nabhy78","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210091158","https://openalex.org/I4210095849","https://openalex.org/I4210157089","https://openalex.org/I4210160189"]},{"id":"https://openalex.org/I4210160189","display_name":"Institut Polytechnique de Bordeaux","ror":"https://ror.org/054qv7y42","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Yann Deval","raw_affiliation_strings":["University Bordeaux, Bordeaux INP, UMR CNRS 5218, IMS Laboratory, Talence, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University Bordeaux, Bordeaux INP, UMR CNRS 5218, IMS Laboratory, Talence, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210157089","https://openalex.org/I4210160189"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110758665","display_name":"H. Lapuyade","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I15057530","display_name":"Universit\u00e9 de Bordeaux","ror":"https://ror.org/057qpr032","country_code":"FR","type":"education","lineage":["https://openalex.org/I15057530"]},{"id":"https://openalex.org/I4210157089","display_name":"Laboratoire de l'Int\u00e9gration du Mat\u00e9riau au Syst\u00e8me","ror":"https://ror.org/04nabhy78","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210091158","https://openalex.org/I4210095849","https://openalex.org/I4210157089","https://openalex.org/I4210160189"]},{"id":"https://openalex.org/I4210160189","display_name":"Institut Polytechnique de Bordeaux","ror":"https://ror.org/054qv7y42","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Herve Lapuyade","raw_affiliation_strings":["University Bordeaux, Bordeaux INP, UMR CNRS 5218, IMS Laboratory, Talence, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University Bordeaux, Bordeaux INP, UMR CNRS 5218, IMS Laboratory, Talence, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210157089","https://openalex.org/I4210160189"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5090763602","display_name":"Fran\u00e7ois Rivet","orcid":"https://orcid.org/0000-0002-6003-4208"},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I15057530","display_name":"Universit\u00e9 de Bordeaux","ror":"https://ror.org/057qpr032","country_code":"FR","type":"education","lineage":["https://openalex.org/I15057530"]},{"id":"https://openalex.org/I4210157089","display_name":"Laboratoire de l'Int\u00e9gration du Mat\u00e9riau au Syst\u00e8me","ror":"https://ror.org/04nabhy78","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210091158","https://openalex.org/I4210095849","https://openalex.org/I4210157089","https://openalex.org/I4210160189"]},{"id":"https://openalex.org/I4210160189","display_name":"Institut Polytechnique de Bordeaux","ror":"https://ror.org/054qv7y42","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Francois Rivet","raw_affiliation_strings":["University Bordeaux, Bordeaux INP, UMR CNRS 5218, IMS Laboratory, Talence, France"],"raw_orcid":"https://orcid.org/0000-0002-6003-4208","affiliations":[{"raw_affiliation_string":"University Bordeaux, Bordeaux INP, UMR CNRS 5218, IMS Laboratory, Talence, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210157089","https://openalex.org/I4210160189"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0813,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.41420919,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"68","issue":"2","first_page":"602","last_page":"606"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dbc","display_name":"dBc","score":0.7907192707061768},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.6888189315795898},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.5173434615135193},{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.49813103675842285},{"id":"https://openalex.org/keywords/delay-locked-loop","display_name":"Delay-locked loop","score":0.4851709008216858},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.47731098532676697},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.47188153862953186},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4541856050491333},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.4528946280479431},{"id":"https://openalex.org/keywords/feedback-loop","display_name":"Feedback loop","score":0.41783207654953003},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.35169586539268494},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.34215497970581055},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2245623767375946}],"concepts":[{"id":"https://openalex.org/C193523891","wikidata":"https://www.wikidata.org/wiki/Q1771950","display_name":"dBc","level":3,"score":0.7907192707061768},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.6888189315795898},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.5173434615135193},{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.49813103675842285},{"id":"https://openalex.org/C190462668","wikidata":"https://www.wikidata.org/wiki/Q492265","display_name":"Delay-locked loop","level":4,"score":0.4851709008216858},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47731098532676697},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.47188153862953186},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4541856050491333},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.4528946280479431},{"id":"https://openalex.org/C186886427","wikidata":"https://www.wikidata.org/wiki/Q5441213","display_name":"Feedback loop","level":2,"score":0.41783207654953003},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.35169586539268494},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.34215497970581055},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2245623767375946},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcsii.2020.3047464","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2020.3047464","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},{"id":"pmh:oai:HAL:hal-03096512v1","is_oa":false,"landing_page_url":"https://hal.science/hal-03096512","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs, 2021, 68 (2), pp.602-606. ⟨10.1109/TCSII.2020.3047464⟩","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W2034151099","https://openalex.org/W2108324407","https://openalex.org/W2171831383","https://openalex.org/W2547188716","https://openalex.org/W2570002238","https://openalex.org/W2754812974","https://openalex.org/W2789248965","https://openalex.org/W2807070092","https://openalex.org/W2889165723","https://openalex.org/W2895509314","https://openalex.org/W2921933403","https://openalex.org/W2987518424","https://openalex.org/W6748963127"],"related_works":["https://openalex.org/W2330020385","https://openalex.org/W2359366503","https://openalex.org/W1912065184","https://openalex.org/W2350996794","https://openalex.org/W2372909716","https://openalex.org/W2080515223","https://openalex.org/W2371350995","https://openalex.org/W2049525097","https://openalex.org/W2161157531","https://openalex.org/W2373829667"],"abstract_inverted_index":{"This":[0],"brief":[1],"presents":[2],"the":[3,21,59,73,78,84,125,129,135,141,145,154,157,161,176,184],"design":[4],"of":[5,16,20,34,48,63,94,99,118,128,140,156,160],"an":[6,17,53],"ultra-low-power":[7],"frequency":[8,28,56,81,86,158],"synthesizer":[9],"based":[10],"on":[11],"a":[12,32,40,46,69,96,103,138,164],"feedback":[13,43,130,166],"loop":[14,44,131,167],"composed":[15],"improved":[18],"version":[19],"Factorial":[22],"Delay-Locked":[23],"Loop":[24],"(F-DLL).":[25],"Its":[26],"output":[27,55,80,162],"is":[29,66,150],"controlled":[30],"by":[31,39],"set":[33,47],"current-starved":[35],"delay":[36,147],"units":[37],"tuned":[38],"standard":[41],"DLL":[42],"and":[45,89,115,132,173,183],"logic":[49],"circuits":[50],"to":[51,58,67,76,83,123,133,152],"generate":[52,77],"RF":[54],"proportional":[57,82],"reference.":[60],"The":[61,169],"objective":[62],"this":[64],"circuit":[65,143,170],"achieve":[68],"power":[70,119],"consumption":[71],"in":[72],"micro-watt":[74],"range":[75,98],"desired":[79],"reference":[85],"between":[87],"1.5":[88],"2.0":[90],"GHz,":[91],"being":[92],"capable":[93],"supporting":[95],"wide":[97],"input":[100],"frequencies":[101],"with":[102],"low":[104],"phase":[105,136],"noise":[106],"(lower":[107],"than":[108],"-90":[109],"dBc/Hz":[110],"at":[111],"1":[112],"MHz":[113],"offset)":[114],"370":[116],"\u03bcW":[117],"consumption.":[120],"In":[121],"order":[122],"ensure":[124],"locking":[126],"state":[127],"reduce":[134],"noise,":[137],"modification":[139],"biasing":[142],"for":[144],"voltage-controlled":[146],"line":[148],"(VCDL)":[149],"used":[151],"improve":[153],"linearity":[155],"response":[159],"using":[163,175],"complementary":[165],"architecture.":[168],"was":[171],"designed":[172],"fabricated":[174],"28":[177],"nm":[178],"FDSOI":[179],"technology":[180],"from":[181],"STMicroelectronics":[182],"measurement":[185],"results":[186],"are":[187],"presented.":[188]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":1},{"year":2021,"cited_by_count":1}],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-10-10T00:00:00"}