{"id":"https://openalex.org/W3094245622","doi":"https://doi.org/10.1109/tcsii.2020.3032282","title":"Analog Self-Timed Programming Circuits for Aging Memristors","display_name":"Analog Self-Timed Programming Circuits for Aging Memristors","publication_year":2020,"publication_date":"2020-10-21","ids":{"openalex":"https://openalex.org/W3094245622","doi":"https://doi.org/10.1109/tcsii.2020.3032282","mag":"3094245622"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2020.3032282","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2020.3032282","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060736222","display_name":"Aidana Irmanova","orcid":"https://orcid.org/0000-0003-3553-1509"},"institutions":[{"id":"https://openalex.org/I60559429","display_name":"Nazarbayev University","ror":"https://ror.org/052bx8q98","country_code":"KZ","type":"education","lineage":["https://openalex.org/I60559429"]}],"countries":["KZ"],"is_corresponding":true,"raw_author_name":"Aidana Irmanova","raw_affiliation_strings":["School of Engineering and Digital Sciences, Nazarbayev University, Nur-Sultan, Kazakhstan"],"affiliations":[{"raw_affiliation_string":"School of Engineering and Digital Sciences, Nazarbayev University, Nur-Sultan, Kazakhstan","institution_ids":["https://openalex.org/I60559429"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026374299","display_name":"Akshay Kumar Maan","orcid":"https://orcid.org/0000-0003-1623-3960"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Akshay Maan","raw_affiliation_strings":["Bio Medical Technology Wing, Indriyam Biologics Pvt. Ltd, Trivandrum, India"],"affiliations":[{"raw_affiliation_string":"Bio Medical Technology Wing, Indriyam Biologics Pvt. Ltd, Trivandrum, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017719665","display_name":"Alex Pappachen James","orcid":null},"institutions":[{"id":"https://openalex.org/I68695296","display_name":"Indian Institute of Information Technology and Management, Kerala","ror":"https://ror.org/02w9cdh50","country_code":"IN","type":"education","lineage":["https://openalex.org/I68695296"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Alex James","raw_affiliation_strings":["School of Electronics, Indian Institute of Information Technology and Management, Trivandrum, India"],"affiliations":[{"raw_affiliation_string":"School of Electronics, Indian Institute of Information Technology and Management, Trivandrum, India","institution_ids":["https://openalex.org/I68695296"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5090657067","display_name":"Leon O. Chua","orcid":"https://orcid.org/0000-0002-1652-5464"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Leon Chua","raw_affiliation_strings":["University of California at Berkeley, Berkeley, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of California at Berkeley, Berkeley, CA, USA","institution_ids":["https://openalex.org/I95457486"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5060736222"],"corresponding_institution_ids":["https://openalex.org/I60559429"],"apc_list":null,"apc_paid":null,"fwci":1.4385,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.82097074,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":98},"biblio":{"volume":"68","issue":"4","first_page":"1133","last_page":"1137"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.8109118342399597},{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.7364190816879272},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5642098784446716},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5194805860519409},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.422953337430954},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.416811466217041},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.41553565859794617},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3252599239349365},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3224724531173706},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.32210853695869446},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.32103434205055237},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.25741344690322876},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1671428680419922},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.10906997323036194},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09269046783447266}],"concepts":[{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.8109118342399597},{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.7364190816879272},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5642098784446716},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5194805860519409},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.422953337430954},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.416811466217041},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.41553565859794617},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3252599239349365},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3224724531173706},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.32210853695869446},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.32103434205055237},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.25741344690322876},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1671428680419922},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.10906997323036194},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09269046783447266},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2020.3032282","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2020.3032282","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W2013700857","https://openalex.org/W2028673792","https://openalex.org/W2062715832","https://openalex.org/W2122352981","https://openalex.org/W2168770118","https://openalex.org/W2395790190","https://openalex.org/W2476616835","https://openalex.org/W2782716747","https://openalex.org/W2785328000","https://openalex.org/W2885981521","https://openalex.org/W2906164721","https://openalex.org/W2915308240","https://openalex.org/W2916560903","https://openalex.org/W2921351161","https://openalex.org/W2922523256","https://openalex.org/W2949327699","https://openalex.org/W2968894861","https://openalex.org/W2997510972","https://openalex.org/W3015724253","https://openalex.org/W3018877817"],"related_works":["https://openalex.org/W3005999147","https://openalex.org/W2015497999","https://openalex.org/W3164474614","https://openalex.org/W2171130799","https://openalex.org/W3173413269","https://openalex.org/W2015477599","https://openalex.org/W2548135880","https://openalex.org/W2144085790","https://openalex.org/W3177379469","https://openalex.org/W1568378063"],"abstract_inverted_index":{"Reliable":[0],"programming":[1,106,131,169],"crossbar":[2,49,112,171],"memristors":[3,108],"to":[4,51],"the":[5,10,17,27,48,52,81,96,129,174],"required":[6],"resistive":[7,31,75],"states":[8],"is":[9,34,119,135],"challenge":[11],"that":[12,42],"hinders":[13],"VLSI":[14],"deployment":[15],"of":[16,30,83,104,157,173],"memristive":[18,24,45],"neural":[19],"network":[20],"circuits,":[21],"as":[22,77,79],"current":[23],"devices":[25],"face":[26],"variability":[28,165],"issues":[29],"switching.":[32],"There":[33],"also":[35],"a":[36,90,110],"need":[37],"for":[38,72,95,152,168],"on-chip":[39],"control":[40,116],"circuitry":[41],"detects":[43],"malfunctioning":[44],"nodes":[46],"in":[47,109],"due":[50],"memristor":[53,150],"aging.":[54],"<italic":[55],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[56,62,98,177,185,193,201],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">Program":[57],"and":[58,121,125,147,163],"Verify</i>":[59],"(":[60],"<inline-formula":[61,97,176,184,192,200],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[63,99,178,186,194,202],"<tex-math":[64,100,179,187,195,203],"notation=\"LaTeX\">$P\\&amp;V$":[65,101],"</tex-math></inline-formula>":[66,102,182,190,198,206],")":[67],"schemes":[68],"can":[69],"be":[70],"used":[71],"both":[73,123],"controlling":[74],"switching":[76],"well":[78],"evaluating":[80],"functionality":[82],"memristors.":[84],"In":[85],"this":[86],"brief,":[87],"we":[88],"propose":[89],"novel":[91],"analog":[92],"circuit":[93,117],"design":[94,134],"approach":[103],"row-by-row":[105],"bipolar":[107],"1T1M":[111,170],"configuration.":[113],"The":[114],"proposed":[115],"(CC)":[118],"self-timed":[120],"performs":[122],"read":[124],"program":[126],"operations,":[127],"decreasing":[128],"overall":[130],"complexity.":[132],"CC":[133],"verified":[136],"with":[137],"Spice":[138],"simulations":[139],"using":[140],"low":[141],"power":[142],"22nm":[143],"high-k":[144],"CMOS":[145,164],"models":[146],"Modified":[148],"S":[149],"model":[151],"large":[153],"scale":[154],"simulations.":[155],"Parasitic":[156],"wire":[158],"lines":[159],"under":[160],"thermal":[161],"variation":[162],"were":[166],"included":[167],"partitions":[172],"sizes":[175],"notation=\"LaTeX\">$16\\times":[180],"16$":[181],",":[183,191,199],"notation=\"LaTeX\">$32\\times":[188],"32$":[189],"notation=\"LaTeX\">$64\\times":[196],"64$":[197],"notation=\"LaTeX\">$128\\times":[204],"128$":[205],".":[207]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":5}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}