{"id":"https://openalex.org/W3086046019","doi":"https://doi.org/10.1109/tcsii.2020.3023825","title":"A Low-Cost High-Throughput Digital Design of Biorealistic Spiking Neuron","display_name":"A Low-Cost High-Throughput Digital Design of Biorealistic Spiking Neuron","publication_year":2020,"publication_date":"2020-09-14","ids":{"openalex":"https://openalex.org/W3086046019","doi":"https://doi.org/10.1109/tcsii.2020.3023825","mag":"3086046019"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2020.3023825","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2020.3023825","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5032368049","display_name":"Junran Pu","orcid":"https://orcid.org/0000-0002-7434-8582"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Junran Pu","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042682339","display_name":"Wang Ling Goh","orcid":"https://orcid.org/0000-0001-7466-8941"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Wang Ling Goh","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036682724","display_name":"Vishnu P. Nambiar","orcid":"https://orcid.org/0000-0001-5570-5911"},"institutions":[{"id":"https://openalex.org/I115228651","display_name":"Agency for Science, Technology and Research","ror":"https://ror.org/036wvzt09","country_code":"SG","type":"government","lineage":["https://openalex.org/I115228651"]},{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Vishnu P. Nambiar","raw_affiliation_strings":["Institute of Microelectronics, A*STAR, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, A*STAR, Singapore","institution_ids":["https://openalex.org/I115228651","https://openalex.org/I4210090209"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019055130","display_name":"Yi Sheng Chong","orcid":"https://orcid.org/0000-0003-4136-6570"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Yi Sheng Chong","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101615706","display_name":"Anh Tuan","orcid":"https://orcid.org/0000-0002-8320-6818"},"institutions":[{"id":"https://openalex.org/I115228651","display_name":"Agency for Science, Technology and Research","ror":"https://ror.org/036wvzt09","country_code":"SG","type":"government","lineage":["https://openalex.org/I115228651"]},{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Anh Tuan Do","raw_affiliation_strings":["Institute of Microelectronics, A*STAR, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, A*STAR, Singapore","institution_ids":["https://openalex.org/I115228651","https://openalex.org/I4210090209"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.8134,"has_fulltext":false,"cited_by_count":17,"citation_normalized_percentile":{"value":0.69957925,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":98},"biblio":{"volume":"68","issue":"4","first_page":"1398","last_page":"1402"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10581","display_name":"Neural dynamics and brain function","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2805","display_name":"Cognitive Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7598037123680115},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.7214536666870117},{"id":"https://openalex.org/keywords/biological-neuron-model","display_name":"Biological neuron model","score":0.6796400547027588},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.63222336769104},{"id":"https://openalex.org/keywords/subtraction","display_name":"Subtraction","score":0.5229930877685547},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.49291372299194336},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3847198188304901},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33437439799308777},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.2625695765018463},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.14771214127540588},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.08179616928100586},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.07155025005340576}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7598037123680115},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.7214536666870117},{"id":"https://openalex.org/C186565885","wikidata":"https://www.wikidata.org/wiki/Q1651163","display_name":"Biological neuron model","level":3,"score":0.6796400547027588},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.63222336769104},{"id":"https://openalex.org/C68060419","wikidata":"https://www.wikidata.org/wiki/Q40754","display_name":"Subtraction","level":2,"score":0.5229930877685547},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.49291372299194336},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3847198188304901},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33437439799308777},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.2625695765018463},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.14771214127540588},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.08179616928100586},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.07155025005340576},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2020.3023825","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2020.3023825","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1576838367","https://openalex.org/W1985940938","https://openalex.org/W2037748403","https://openalex.org/W2045917633","https://openalex.org/W2164653071","https://openalex.org/W2528063041","https://openalex.org/W2890218259","https://openalex.org/W2919634026","https://openalex.org/W2943288550","https://openalex.org/W3014827905","https://openalex.org/W3104751959"],"related_works":["https://openalex.org/W2090049157","https://openalex.org/W1976835164","https://openalex.org/W2134771946","https://openalex.org/W2111241003","https://openalex.org/W189153436","https://openalex.org/W52818356","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W2160474882"],"abstract_inverted_index":{"With":[0],"the":[1,56,65,70,77,86,102,106,119],"ability":[2],"to":[3,54,99],"generate":[4],"different":[5,91],"spiking":[6,92],"patterns,":[7],"Izhikevich":[8,40,72],"model":[9,21,68,73],"has":[10],"well":[11],"been":[12],"considered":[13],"a":[14,33],"computationally":[15],"efficient":[16],"and":[17,50,69,109,115],"biologically":[18],"plausible":[19],"neuron":[20,41,67],"for":[22,39],"applications":[23],"such":[24],"as":[25],"brain":[26],"dynamic":[27,61],"behavior":[28],"study.":[29],"This":[30],"brief":[31],"presents":[32],"low-cost,":[34],"high-throughput":[35],"digital":[36],"hardware":[37,58],"design":[38,45,88,104,121],"model.":[42],"The":[43,60,80],"proposed":[44,66,87,103],"requires":[46],"only":[47],"addition,":[48],"subtraction":[49],"logic":[51],"shifts":[52],"operations":[53],"achieve":[55],"low":[57],"cost.":[59],"behaviors":[62],"of":[63],"both":[64],"original":[71],"were":[74],"analyzed":[75],"using":[76],"phase":[78],"portraits.":[79],"FPGA":[81],"implementation":[82],"results":[83],"demonstrated":[84],"that":[85],"can":[89],"reproduce":[90],"patterns":[93],"with":[94],"very":[95],"high":[96],"throughput.":[97],"Compared":[98],"existing":[100],"designs,":[101],"achieves":[105],"lowest":[107],"slices":[108],"LUTs":[110],"utilization,":[111],"which":[112],"are":[113],"73%":[114],"11%":[116],"lower":[117],"than":[118],"latest":[120],"(HOMIN),":[122],"respectively.":[123]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":3}],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-10-10T00:00:00"}
