{"id":"https://openalex.org/W3031858395","doi":"https://doi.org/10.1109/tcsii.2020.2998284","title":"Power-Optimal Mapping of CNN Applications to Cloud-Based Multi-FPGA Platforms","display_name":"Power-Optimal Mapping of CNN Applications to Cloud-Based Multi-FPGA Platforms","publication_year":2020,"publication_date":"2020-05-28","ids":{"openalex":"https://openalex.org/W3031858395","doi":"https://doi.org/10.1109/tcsii.2020.2998284","mag":"3031858395"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2020.2998284","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2020.2998284","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://hdl.handle.net/2117/340450","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5059220833","display_name":"Junnan Shan","orcid":"https://orcid.org/0000-0001-9405-8825"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Junnan Shan","raw_affiliation_strings":["Politecnico di Torino, Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030646218","display_name":"Mihai T. Lazarescu","orcid":"https://orcid.org/0000-0003-0884-5158"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Mihai T. Lazarescu","raw_affiliation_strings":["Politecnico di Torino, Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031451250","display_name":"Jordi Cortadella","orcid":"https://orcid.org/0000-0001-8114-250X"},"institutions":[{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Jordi Cortadella","raw_affiliation_strings":["Universitat Polit\u00e8cnica de Catalunya, Barcelona, Spain"],"affiliations":[{"raw_affiliation_string":"Universitat Polit\u00e8cnica de Catalunya, Barcelona, Spain","institution_ids":["https://openalex.org/I9617848"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050365912","display_name":"Luciano Lavagno","orcid":"https://orcid.org/0000-0002-9762-6522"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luciano Lavagno","raw_affiliation_strings":["Politecnico di Torino, Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036528695","display_name":"Mario R. Casu","orcid":"https://orcid.org/0000-0002-1026-0178"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Mario R. Casu","raw_affiliation_strings":["Politecnico di Torino, Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5059220833"],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":null,"apc_paid":null,"fwci":0.9811,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.78101633,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"67","issue":"12","first_page":"3073","last_page":"3077"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8292744159698486},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7977492213249207},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.5901359915733337},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5337643623352051},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.5134952664375305},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.5118974447250366},{"id":"https://openalex.org/keywords/upload","display_name":"Upload","score":0.5057475566864014},{"id":"https://openalex.org/keywords/convolutional-neural-network","display_name":"Convolutional neural network","score":0.49955081939697266},{"id":"https://openalex.org/keywords/cloud-computing","display_name":"Cloud computing","score":0.45852604508399963},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4525836706161499},{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.4397045969963074},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.24137607216835022},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.18226683139801025},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.11516442894935608},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.08925709128379822}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8292744159698486},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7977492213249207},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.5901359915733337},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5337643623352051},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5134952664375305},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.5118974447250366},{"id":"https://openalex.org/C71901391","wikidata":"https://www.wikidata.org/wiki/Q7126699","display_name":"Upload","level":2,"score":0.5057475566864014},{"id":"https://openalex.org/C81363708","wikidata":"https://www.wikidata.org/wiki/Q17084460","display_name":"Convolutional neural network","level":2,"score":0.49955081939697266},{"id":"https://openalex.org/C79974875","wikidata":"https://www.wikidata.org/wiki/Q483639","display_name":"Cloud computing","level":2,"score":0.45852604508399963},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4525836706161499},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.4397045969963074},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.24137607216835022},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.18226683139801025},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.11516442894935608},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.08925709128379822},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/tcsii.2020.2998284","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2020.2998284","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},{"id":"pmh:oai:upcommons.upc.edu:2117/340450","is_oa":true,"landing_page_url":"https://hdl.handle.net/2117/340450","pdf_url":null,"source":{"id":"https://openalex.org/S4210207057","display_name":"QRU Quaderns de Recerca en Urbanisme","issn_l":"2014-9689","issn":["2014-9689","2385-6777"],"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310322448","host_organization_name":"Q71272178","host_organization_lineage":["https://openalex.org/P4310322448"],"host_organization_lineage_names":["Q71272178"],"type":"journal"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/article"},{"id":"pmh:oai:dnet:upcommonspor::6e44c07ff180d5c3bbdabbee7b055e75","is_oa":true,"landing_page_url":"http://hdl.handle.net/2117/340450","pdf_url":null,"source":{"id":"https://openalex.org/S4306402641","display_name":"LA Referencia (Red Federada de Repositorios Institucionales de Publicaciones Cient\u00edficas)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4383465926","host_organization_name":"LA Referencia","host_organization_lineage":["https://openalex.org/I4383465926"],"host_organization_lineage_names":[],"type":"repository"},"license":"public-domain","license_id":"https://openalex.org/licenses/public-domain","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/submittedVersion"}],"best_oa_location":{"id":"pmh:oai:upcommons.upc.edu:2117/340450","is_oa":true,"landing_page_url":"https://hdl.handle.net/2117/340450","pdf_url":null,"source":{"id":"https://openalex.org/S4210207057","display_name":"QRU Quaderns de Recerca en Urbanisme","issn_l":"2014-9689","issn":["2014-9689","2385-6777"],"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310322448","host_organization_name":"Q71272178","host_organization_lineage":["https://openalex.org/P4310322448"],"host_organization_lineage_names":["Q71272178"],"type":"journal"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.9100000262260437}],"awards":[{"id":"https://openalex.org/G2629925963","display_name":null,"funder_award_id":"H2020-ICT-671632","funder_id":"https://openalex.org/F4320320300","funder_display_name":"European Commission"},{"id":"https://openalex.org/G4683214174","display_name":null,"funder_award_id":"2017 SGR 786","funder_id":"https://openalex.org/F4320321505","funder_display_name":"Generalitat de Catalunya"}],"funders":[{"id":"https://openalex.org/F4320320300","display_name":"European Commission","ror":"https://ror.org/00k4n6c32"},{"id":"https://openalex.org/F4320321505","display_name":"Generalitat de Catalunya","ror":"https://ror.org/01bg62x04"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1686810756","https://openalex.org/W2088899870","https://openalex.org/W2163605009","https://openalex.org/W2165100134","https://openalex.org/W2475840367","https://openalex.org/W2542189141","https://openalex.org/W2583220202","https://openalex.org/W2818599633","https://openalex.org/W2962835968","https://openalex.org/W4235344346","https://openalex.org/W4239385313","https://openalex.org/W6637373629","https://openalex.org/W6684191040"],"related_works":["https://openalex.org/W1972953980","https://openalex.org/W2050988079","https://openalex.org/W1513897901","https://openalex.org/W4294000495","https://openalex.org/W1938409394","https://openalex.org/W2027800187","https://openalex.org/W2072390380","https://openalex.org/W2205497670","https://openalex.org/W2073623973","https://openalex.org/W1934962831"],"abstract_inverted_index":{"Multi-FPGA":[0],"platforms":[1],"like":[2,14],"Amazon":[3],"Web":[4],"Services":[5],"F1":[6],"are":[7],"perfect":[8],"to":[9,25,54,121],"accelerate":[10],"multi-kernel":[11],"pipelined":[12],"applications,":[13],"Convolutional":[15],"Neural":[16],"Networks":[17],"(CNNs).":[18],"To":[19],"reduce":[20],"energy":[21],"consumption,":[22],"we":[23],"propose":[24],"upload":[26],"at":[27],"runtime":[28],"the":[29,43,55,57,87,90,99,117,125,142,145,150],"best":[30,44],"power-optimized":[31],"CNN":[32],"implementation":[33,127,147,152],"for":[34],"a":[35,71,95],"given":[36],"throughput":[37],"constraint.":[38],"Our":[39],"design":[40],"method":[41],"gives":[42],"number":[45,58],"of":[46,49,59,81,89,144],"parallel":[47],"instances":[48],"each":[50,82],"kernel,":[51],"their":[52,63],"allocation":[53],"FPGAs,":[56],"powered-on":[60],"FPGAs":[61],"and":[62,79,98,108,110],"clock":[64,123],"frequency.":[65],"This":[66],"is":[67,128,134],"obtained":[68],"by":[69],"solving":[70],"mixed-integer,":[72],"non-linear":[73],"optimization":[74],"problem":[75],"that":[76,116],"models":[77],"power":[78,118],"performance":[80],"component,":[83],"as":[84,86],"well":[85],"duration":[88],"computation":[91],"phases-data":[92],"transfer":[93,105],"between":[94,106],"host":[96],"CPU":[97],"FPGA":[100,111],"memory":[101],"(typically":[102],"DDR),":[103],"data":[104],"DDR":[107],"FPGA,":[109],"computation.":[112],"The":[113],"results":[114],"show":[115],"saved":[119],"compared":[120],"simply":[122,140],"gating":[124],"fastest":[126,146],"obviously":[129],"very":[130],"high,":[131],"but":[132],"it":[133],"also":[135],"much":[136],"more":[137],"significant":[138],"than":[139],"scaling":[141],"frequency":[143],"or":[148],"replicating":[149],"slowest":[151],"on":[153],"multiple":[154],"FPGAs.":[155]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":3}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}