{"id":"https://openalex.org/W3012400995","doi":"https://doi.org/10.1109/tcsii.2020.2979937","title":"Error-Aware Design Procedure to Implement Hardware-Efficient Logarithmic Circuits","display_name":"Error-Aware Design Procedure to Implement Hardware-Efficient Logarithmic Circuits","publication_year":2020,"publication_date":"2020-03-10","ids":{"openalex":"https://openalex.org/W3012400995","doi":"https://doi.org/10.1109/tcsii.2020.2979937","mag":"3012400995"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2020.2979937","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2020.2979937","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5000103313","display_name":"Merin Loukrakpam","orcid":"https://orcid.org/0000-0001-7325-5424"},"institutions":[{"id":"https://openalex.org/I16471300","display_name":"Manipur University","ror":"https://ror.org/03964fn67","country_code":"IN","type":"education","lineage":["https://openalex.org/I16471300"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Merin Loukrakpam","raw_affiliation_strings":["Department of ECE, Manipur Technical University, Manipur, India"],"affiliations":[{"raw_affiliation_string":"Department of ECE, Manipur Technical University, Manipur, India","institution_ids":["https://openalex.org/I16471300"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110531919","display_name":"Madhuchhanda Choudhury","orcid":null},"institutions":[{"id":"https://openalex.org/I151903974","display_name":"National Institute Of Technology Silchar","ror":"https://ror.org/001ws2a36","country_code":"IN","type":"education","lineage":["https://openalex.org/I151903974"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Madhuchhanda Choudhury","raw_affiliation_strings":["Department of ECE, National Institute of Technology Silchar, Assam, India"],"affiliations":[{"raw_affiliation_string":"Department of ECE, National Institute of Technology Silchar, Assam, India","institution_ids":["https://openalex.org/I151903974"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5000103313"],"corresponding_institution_ids":["https://openalex.org/I16471300"],"apc_list":null,"apc_paid":null,"fwci":0.8443,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.7820526,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"67","issue":"5","first_page":"851","last_page":"855"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.991599977016449,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6659793257713318},{"id":"https://openalex.org/keywords/logarithm","display_name":"Logarithm","score":0.5793157815933228},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5440177321434021},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.48257938027381897},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.4180130362510681},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3500531017780304},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.34911656379699707},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.20068418979644775},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14073100686073303},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12318688631057739}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6659793257713318},{"id":"https://openalex.org/C39927690","wikidata":"https://www.wikidata.org/wiki/Q11197","display_name":"Logarithm","level":2,"score":0.5793157815933228},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5440177321434021},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.48257938027381897},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.4180130362510681},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3500531017780304},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.34911656379699707},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.20068418979644775},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14073100686073303},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12318688631057739},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2020.2979937","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2020.2979937","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8899999856948853}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1982003447","https://openalex.org/W2004733300","https://openalex.org/W2056933915","https://openalex.org/W2105084502","https://openalex.org/W2110953186","https://openalex.org/W2111013824","https://openalex.org/W2113542749","https://openalex.org/W2136996778","https://openalex.org/W2144398730","https://openalex.org/W2151682451","https://openalex.org/W2156012463","https://openalex.org/W2309272862","https://openalex.org/W2517468887","https://openalex.org/W2519418681","https://openalex.org/W2591659919","https://openalex.org/W2786971984","https://openalex.org/W6682841988"],"related_works":["https://openalex.org/W2952185452","https://openalex.org/W2046736294","https://openalex.org/W1519526186","https://openalex.org/W2980815195","https://openalex.org/W2260200182","https://openalex.org/W4293584968","https://openalex.org/W2384758770","https://openalex.org/W2032964960","https://openalex.org/W4382701036","https://openalex.org/W2081086357"],"abstract_inverted_index":{"State-of-the-art":[0],"accurate":[1],"logarithmic":[2,23,65,73,126],"circuits":[3,74,127],"involve":[4],"shift-and-add":[5],"operations":[6],"which":[7,27,81],"demand":[8],"a":[9,16,21,68],"high":[10],"area":[11],"cost.":[12],"In":[13],"this":[14],"brief,":[15],"design":[17,79],"procedure":[18,53,80],"to":[19,63,107],"implement":[20,64],"hardware-efficient":[22],"circuit":[24,66],"is":[25,37],"proposed":[26,52,103],"eliminate":[28],"the":[29,49,55,60,78],"use":[30],"of":[31,42,57,86,124,128],"shift":[32],"operations.":[33],"Logarithmic":[34],"function":[35],"curve":[36],"approximated":[38],"using":[39,77,98],"multiple":[40],"regions":[41,58],"unity":[43],"slope":[44],"straight":[45],"lines":[46],"by":[47],"adjusting":[48],"intercepts.":[50],"The":[51,94,102],"determines":[54],"number":[56],"and":[59,92,110,117],"corresponding":[61],"intercepts":[62],"for":[67],"desired":[69],"error":[70,85],"constraint.":[71],"Six":[72],"were":[75,96],"realized":[76],"exhibited":[82],"maximum":[83],"absolute":[84],"0.029,":[87],"0.0175,":[88],"0.0083,":[89],"0.0026,":[90],"0.0021":[91],"0.00179.":[93],"designs":[95,104],"synthesized":[97],"65nm":[99],"CMOS":[100],"technology.":[101],"showed":[105],"up":[106],"83.60%,":[108],"91.76%":[109],"94.56%":[111],"reduction":[112],"in":[113],"energy,":[114],"energy-delay":[115],"product":[116,119],"area-delay-power":[118],"when":[120],"compared":[121],"with":[122],"those":[123],"state-of-the-art":[125],"comparable":[129],"error.":[130]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}