{"id":"https://openalex.org/W3003681287","doi":"https://doi.org/10.1109/tcsii.2020.2970724","title":"A Cost-Aware Framework for Lifetime Reliability of TSV-Based 3D-IC Design","display_name":"A Cost-Aware Framework for Lifetime Reliability of TSV-Based 3D-IC Design","publication_year":2020,"publication_date":"2020-01-31","ids":{"openalex":"https://openalex.org/W3003681287","doi":"https://doi.org/10.1109/tcsii.2020.2970724","mag":"3003681287"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2020.2970724","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2020.2970724","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035268258","display_name":"Raviteja P. Reddy","orcid":null},"institutions":[{"id":"https://openalex.org/I65181880","display_name":"Indian Institute of Technology Hyderabad","ror":"https://ror.org/01j4v3x97","country_code":"IN","type":"education","lineage":["https://openalex.org/I65181880"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Raviteja P. Reddy","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Hyderabad, Hyderabad, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Hyderabad, Hyderabad, India","institution_ids":["https://openalex.org/I65181880"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044085104","display_name":"Amit Acharyya","orcid":"https://orcid.org/0000-0002-5636-0676"},"institutions":[{"id":"https://openalex.org/I65181880","display_name":"Indian Institute of Technology Hyderabad","ror":"https://ror.org/01j4v3x97","country_code":"IN","type":"education","lineage":["https://openalex.org/I65181880"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Amit Acharyya","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Hyderabad, Hyderabad, India"],"raw_orcid":"https://orcid.org/0000-0002-5636-0676","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Hyderabad, Hyderabad, India","institution_ids":["https://openalex.org/I65181880"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5107854382","display_name":"Saqib Khursheed","orcid":"https://orcid.org/0000-0002-5720-0607"},"institutions":[{"id":"https://openalex.org/I146655781","display_name":"University of Liverpool","ror":"https://ror.org/04xs57h96","country_code":"GB","type":"education","lineage":["https://openalex.org/I146655781"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Saqib Khursheed","raw_affiliation_strings":["Department of Electrical Engineering and Electronics, University of Liverpool, Liverpool, U.K"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Electronics, University of Liverpool, Liverpool, U.K","institution_ids":["https://openalex.org/I146655781"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.7066,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.68662374,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"67","issue":"11","first_page":"2677","last_page":"2681"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10783","display_name":"Additive Manufacturing and 3D Printing Technologies","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/2203","display_name":"Automotive Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.7902313470840454},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.7778877019882202},{"id":"https://openalex.org/keywords/workload","display_name":"Workload","score":0.6488688588142395},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.6436561346054077},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.636620283126831},{"id":"https://openalex.org/keywords/through-silicon-via","display_name":"Through-silicon via","score":0.5629392266273499},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.4944186210632324},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.46441906690597534},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.4353819489479065},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33703967928886414},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.28888481855392456},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.08242353796958923}],"concepts":[{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.7902313470840454},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.7778877019882202},{"id":"https://openalex.org/C2778476105","wikidata":"https://www.wikidata.org/wiki/Q628539","display_name":"Workload","level":2,"score":0.6488688588142395},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.6436561346054077},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.636620283126831},{"id":"https://openalex.org/C45632049","wikidata":"https://www.wikidata.org/wiki/Q1578120","display_name":"Through-silicon via","level":3,"score":0.5629392266273499},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.4944186210632324},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.46441906690597534},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4353819489479065},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33703967928886414},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28888481855392456},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.08242353796958923},{"id":"https://openalex.org/C160671074","wikidata":"https://www.wikidata.org/wiki/Q267131","display_name":"Wafer","level":2,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcsii.2020.2970724","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2020.2970724","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},{"id":"pmh:oai:raiith.iith.ac.in:7974","is_oa":false,"landing_page_url":"http://raiith.iith.ac.in/7974/","pdf_url":null,"source":{"id":"https://openalex.org/S4306400292","display_name":"Research Archive of Indian Institute of Technology Hyderabad (Indian Institute of Technology Hyderabad)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I65181880","host_organization_name":"Indian Institute of Technology Hyderabad","host_organization_lineage":["https://openalex.org/I65181880"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.46000000834465027,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320325255","display_name":"Ministry of Electronics and Information technology","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1964180067","https://openalex.org/W1992580876","https://openalex.org/W2004420027","https://openalex.org/W2005613478","https://openalex.org/W2014715605","https://openalex.org/W2029558675","https://openalex.org/W2033330932","https://openalex.org/W2034750069","https://openalex.org/W2035480303","https://openalex.org/W2062899780","https://openalex.org/W2087055254","https://openalex.org/W2107868198","https://openalex.org/W2126339718","https://openalex.org/W2126763328","https://openalex.org/W2135778569","https://openalex.org/W2144149750","https://openalex.org/W2148145527","https://openalex.org/W2154517054","https://openalex.org/W2168584827","https://openalex.org/W2397543037","https://openalex.org/W2603592157","https://openalex.org/W2612034060","https://openalex.org/W2790222582","https://openalex.org/W2980327318","https://openalex.org/W3140239545","https://openalex.org/W6678858565","https://openalex.org/W6769045050"],"related_works":["https://openalex.org/W2027159884","https://openalex.org/W2016970881","https://openalex.org/W1990828594","https://openalex.org/W2333804548","https://openalex.org/W2534942874","https://openalex.org/W3093450488","https://openalex.org/W2549021975","https://openalex.org/W1981130885","https://openalex.org/W2016589506","https://openalex.org/W2376702355"],"abstract_inverted_index":{"The":[0,17,33],"lifetime":[1,64,90,107],"reliability":[2,22,65,91,108],"of":[3,14,52,109],"3D-IC":[4,67],"is":[5,54,86],"limited":[6],"due":[7],"to":[8,99],"defects,":[9],"thermal":[10],"issues":[11],"and":[12,45,50,74,80,92,105,111],"aging":[13],"Through-silicon-via":[15],"(TSV).":[16],"state-of-the-art":[18],"methodologies":[19],"for":[20,88],"enhancing":[21],"are":[23],"based":[24],"on":[25,82],"the":[26,39,48],"fault":[27,96],"tolerance":[28,97],"techniques":[29,98],"using":[30],"redundant":[31],"TSVs.":[32],"existing":[34,95],"methodlogies":[35],"do":[36],"not":[37],"consider":[38],"target":[40],"lifetime,":[41],"various":[42,70],"failure":[43,72],"mechanisms":[44,73],"workload.":[46],"Thus":[47],"performance":[49],"cost":[51],"3D-ICs":[53],"affected":[55],"significantly.":[56],"In":[57],"this":[58],"brief,":[59],"we":[60],"propose":[61],"a":[62],"TSV":[63,71,89,103],"aware":[66],"framework":[68],"with":[69,94],"workload":[75],"into":[76],"consideration.":[77],"Subsequently,":[78],"validation":[79],"evaluation":[81],"IWLS'05":[83],"benchmark":[84],"circuits":[85],"done":[87],"compared":[93],"provide":[100],"synergy":[101],"between":[102],"count":[104],"targeted":[106],"Router":[110],"Ring":[112],"architectures.":[113]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
