{"id":"https://openalex.org/W2991671942","doi":"https://doi.org/10.1109/tcsii.2019.2957727","title":"A 2nd-Order Noise-Shaping SAR ADC With Lossless Dynamic Amplifier Assisted Integrator","display_name":"A 2nd-Order Noise-Shaping SAR ADC With Lossless Dynamic Amplifier Assisted Integrator","publication_year":2019,"publication_date":"2019-12-05","ids":{"openalex":"https://openalex.org/W2991671942","doi":"https://doi.org/10.1109/tcsii.2019.2957727","mag":"2991671942"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2019.2957727","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2019.2957727","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100732248","display_name":"Yanbo Zhang","orcid":"https://orcid.org/0000-0002-7627-488X"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Yanbo Zhang","raw_affiliation_strings":["Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, China","Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100635138","display_name":"Shubin Liu","orcid":"https://orcid.org/0000-0002-9942-0069"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shubin Liu","raw_affiliation_strings":["Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, China","Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091208470","display_name":"Binbin Tian","orcid":"https://orcid.org/0000-0002-5521-2209"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Binbin Tian","raw_affiliation_strings":["Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, China","Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071933088","display_name":"Yan Zhu","orcid":null},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Yan Zhu","raw_affiliation_strings":["State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macau, China"],"raw_orcid":"https://orcid.org/0000-0002-8298-3244","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035229843","display_name":"Chi\u2010Hang Chan","orcid":"https://orcid.org/0000-0002-7635-1101"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Chi-Hang Chan","raw_affiliation_strings":["State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macau, China"],"raw_orcid":"https://orcid.org/0000-0002-7635-1101","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039575274","display_name":"Zhangming Zhu","orcid":"https://orcid.org/0000-0002-7764-1928"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhangming Zhu","raw_affiliation_strings":["Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, China","Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, China"],"raw_orcid":"https://orcid.org/0000-0002-7764-1928","affiliations":[{"raw_affiliation_string":"Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"Shaanxi Key Laboratory of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, China","institution_ids":["https://openalex.org/I149594827"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5100732248"],"corresponding_institution_ids":["https://openalex.org/I149594827"],"apc_list":null,"apc_paid":null,"fwci":1.7944,"has_fulltext":false,"cited_by_count":41,"citation_normalized_percentile":{"value":0.84333574,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":97,"max":99},"biblio":{"volume":"67","issue":"10","first_page":"1819","last_page":"1823"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.7940058708190918},{"id":"https://openalex.org/keywords/oversampling","display_name":"Oversampling","score":0.7754663228988647},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.7436054944992065},{"id":"https://openalex.org/keywords/noise-shaping","display_name":"Noise shaping","score":0.6669875383377075},{"id":"https://openalex.org/keywords/lossless-compression","display_name":"Lossless compression","score":0.6189976930618286},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5662930607795715},{"id":"https://openalex.org/keywords/effective-number-of-bits","display_name":"Effective number of bits","score":0.5340470671653748},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.4881942868232727},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4732704162597656},{"id":"https://openalex.org/keywords/dynamic-range","display_name":"Dynamic range","score":0.4534100294113159},{"id":"https://openalex.org/keywords/wideband","display_name":"Wideband","score":0.4480394721031189},{"id":"https://openalex.org/keywords/quantization","display_name":"Quantization (signal processing)","score":0.43082401156425476},{"id":"https://openalex.org/keywords/figure-of-merit","display_name":"Figure of merit","score":0.4165356457233429},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.41278278827667236},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.38270115852355957},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.3488786220550537},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3068527281284332},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.3008250296115875},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24153012037277222},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.17195013165473938},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.15299949049949646},{"id":"https://openalex.org/keywords/data-compression","display_name":"Data compression","score":0.07505655288696289},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.07047700881958008}],"concepts":[{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.7940058708190918},{"id":"https://openalex.org/C197323446","wikidata":"https://www.wikidata.org/wiki/Q331222","display_name":"Oversampling","level":3,"score":0.7754663228988647},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.7436054944992065},{"id":"https://openalex.org/C9083635","wikidata":"https://www.wikidata.org/wiki/Q2133535","display_name":"Noise shaping","level":2,"score":0.6669875383377075},{"id":"https://openalex.org/C81081738","wikidata":"https://www.wikidata.org/wiki/Q55542","display_name":"Lossless compression","level":3,"score":0.6189976930618286},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5662930607795715},{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.5340470671653748},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.4881942868232727},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4732704162597656},{"id":"https://openalex.org/C87133666","wikidata":"https://www.wikidata.org/wiki/Q1161699","display_name":"Dynamic range","level":2,"score":0.4534100294113159},{"id":"https://openalex.org/C2780202535","wikidata":"https://www.wikidata.org/wiki/Q4524457","display_name":"Wideband","level":2,"score":0.4480394721031189},{"id":"https://openalex.org/C28855332","wikidata":"https://www.wikidata.org/wiki/Q198099","display_name":"Quantization (signal processing)","level":2,"score":0.43082401156425476},{"id":"https://openalex.org/C130277099","wikidata":"https://www.wikidata.org/wiki/Q3676605","display_name":"Figure of merit","level":2,"score":0.4165356457233429},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.41278278827667236},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.38270115852355957},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.3488786220550537},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3068527281284332},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.3008250296115875},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24153012037277222},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.17195013165473938},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.15299949049949646},{"id":"https://openalex.org/C78548338","wikidata":"https://www.wikidata.org/wiki/Q2493","display_name":"Data compression","level":2,"score":0.07505655288696289},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.07047700881958008},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2019.2957727","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2019.2957727","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6700000166893005,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G1525308069","display_name":null,"funder_award_id":"61961160703","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G7010476974","display_name":null,"funder_award_id":"61625403","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G8834403303","display_name":null,"funder_award_id":"61874174","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1526838648","https://openalex.org/W2071087062","https://openalex.org/W2164251692","https://openalex.org/W2487410127","https://openalex.org/W2586158728","https://openalex.org/W2593067874","https://openalex.org/W2740728963","https://openalex.org/W2741408477","https://openalex.org/W2746527312","https://openalex.org/W2766124299","https://openalex.org/W2772904461","https://openalex.org/W2897458229","https://openalex.org/W2913591592","https://openalex.org/W2921260700","https://openalex.org/W2922361076"],"related_works":["https://openalex.org/W2914701507","https://openalex.org/W2982541868","https://openalex.org/W3176856240","https://openalex.org/W3011208887","https://openalex.org/W2905521207","https://openalex.org/W2580320552","https://openalex.org/W3002516890","https://openalex.org/W2909877441","https://openalex.org/W1526838648","https://openalex.org/W4205178608"],"abstract_inverted_index":{"This":[0],"brief":[1],"presents":[2],"a":[3,19,36,40,55,70,92,105],"2":[4],"<sup":[5],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[6],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">nd</sup>":[7],"-order":[8],"noise-shaping":[9],"(NS)":[10],"successive":[11],"approximation":[12],"register":[13],"(SAR)":[14],"analog-to-digital":[15],"converter":[16],"(ADC)":[17],"with":[18,44],"lossless":[20,33,53],"integrator":[21,34],"for":[22],"achieving":[23],"low":[24,56],"power":[25],"and":[26,39,97],"high":[27],"NS":[28],"efficiency.":[29],"It":[30,90],"implements":[31],"the":[32,52,63,74,111],"through":[35],"ping-pong":[37],"structure":[38],"low-gain":[41],"dynamic":[42],"amplifier":[43],"moderate":[45],"gain":[46],"variation":[47],"tolerance.":[48],"Taking":[49],"advantage":[50],"of":[51,101,107,115,123,126],"integrator,":[54],"resolution":[57],"SAR":[58],"ADC":[59,78],"is":[60],"allowed":[61],"under":[62],"same":[64],"quantization":[65],"noise":[66,96],"budget.":[67],"Fabricated":[68],"in":[69],"65-nm":[71],"CMOS":[72],"process,":[73],"prototype":[75],"8-bit":[76],"NS-SAR":[77],"consumes":[79],"1.24":[80],"mW":[81],"at":[82,87,110],"1.2":[83],"V":[84],"while":[85],"operating":[86],"100":[88],"MS/s.":[89],"achieves":[91],"peak":[93],"signal":[94],"to":[95,118],"distortion":[98],"ratio":[99,113],"(SNDR)":[100],"77":[102],"dB":[103],"over":[104],"bandwidth":[106],"3.125":[108],"MHz":[109],"oversampling":[112],"(OSR)":[114],"16,":[116],"leading":[117],"an":[119],"SNDR-based":[120],"Schreier":[121],"figure":[122],"merit":[124],"(FoM)":[125],"171":[127],"dB.":[128]},"counts_by_year":[{"year":2025,"cited_by_count":5},{"year":2024,"cited_by_count":11},{"year":2023,"cited_by_count":7},{"year":2022,"cited_by_count":10},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}