{"id":"https://openalex.org/W2981508573","doi":"https://doi.org/10.1109/tcsii.2019.2949565","title":"A Fully Synthesizable Ultra-${N}$ Audio Frequency Multiplier for HDMI Applications","display_name":"A Fully Synthesizable Ultra-${N}$ Audio Frequency Multiplier for HDMI Applications","publication_year":2019,"publication_date":"2019-10-25","ids":{"openalex":"https://openalex.org/W2981508573","doi":"https://doi.org/10.1109/tcsii.2019.2949565","mag":"2981508573"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2019.2949565","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2019.2949565","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5085102729","display_name":"Pao-Lung Chen","orcid":"https://orcid.org/0000-0002-3848-4253"},"institutions":[{"id":"https://openalex.org/I4387154394","display_name":"National Kaohsiung University of Science and Technology","ror":"https://ror.org/00hfj7g70","country_code":null,"type":"education","lineage":["https://openalex.org/I4387154394"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Pao-Lung Chen","raw_affiliation_strings":["National Kaohsiung University of Science and Technology, Kaohsiung City, Taiwan"],"affiliations":[{"raw_affiliation_string":"National Kaohsiung University of Science and Technology, Kaohsiung City, Taiwan","institution_ids":["https://openalex.org/I4387154394","https://openalex.org/I4387154394"]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5085102729"],"corresponding_institution_ids":["https://openalex.org/I4387154394"],"apc_list":null,"apc_paid":null,"fwci":0.2385,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.55875234,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":"67","issue":"10","first_page":"2134","last_page":"2138"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/frequency-multiplier","display_name":"Frequency multiplier","score":0.6382308006286621},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5803009271621704},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.5436316132545471},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.5179247260093689},{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.4993264675140381},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.45810839533805847},{"id":"https://openalex.org/keywords/cpu-multiplier","display_name":"CPU multiplier","score":0.4390038549900055},{"id":"https://openalex.org/keywords/frequency-divider","display_name":"Frequency divider","score":0.4335036277770996},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.40472131967544556},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.39655235409736633},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.35973265767097473},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.30445149540901184},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.2704245448112488},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.26624491810798645},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19687959551811218},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.19642925262451172},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.15562167763710022},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12129229307174683},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11006578803062439},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.091891348361969}],"concepts":[{"id":"https://openalex.org/C146002875","wikidata":"https://www.wikidata.org/wiki/Q1074289","display_name":"Frequency multiplier","level":3,"score":0.6382308006286621},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5803009271621704},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.5436316132545471},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.5179247260093689},{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.4993264675140381},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.45810839533805847},{"id":"https://openalex.org/C125576049","wikidata":"https://www.wikidata.org/wiki/Q2246273","display_name":"CPU multiplier","level":5,"score":0.4390038549900055},{"id":"https://openalex.org/C74982907","wikidata":"https://www.wikidata.org/wiki/Q1455624","display_name":"Frequency divider","level":3,"score":0.4335036277770996},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.40472131967544556},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.39655235409736633},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.35973265767097473},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.30445149540901184},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.2704245448112488},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.26624491810798645},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19687959551811218},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.19642925262451172},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.15562167763710022},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12129229307174683},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11006578803062439},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.091891348361969},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2019.2949565","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2019.2949565","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G5082118279","display_name":null,"funder_award_id":"MOST-104-2221-E37-032","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"}],"funders":[{"id":"https://openalex.org/F4320322795","display_name":"Ministry of Science and Technology, Taiwan","ror":"https://ror.org/02kv4zf79"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W9595204","https://openalex.org/W2024302345","https://openalex.org/W2038179376","https://openalex.org/W2059166966","https://openalex.org/W2059713124","https://openalex.org/W2142324750","https://openalex.org/W2172440946","https://openalex.org/W2480426326","https://openalex.org/W2496938897","https://openalex.org/W2517722583","https://openalex.org/W2523577972","https://openalex.org/W2901281781"],"related_works":["https://openalex.org/W3095898867","https://openalex.org/W1975478216","https://openalex.org/W2099990255","https://openalex.org/W3207257560","https://openalex.org/W2167684701","https://openalex.org/W2185082472","https://openalex.org/W1915959989","https://openalex.org/W2358217230","https://openalex.org/W2513253674","https://openalex.org/W2088659966"],"abstract_inverted_index":{"This":[0],"brief":[1],"develops":[2],"a":[3,48,62,81,95],"highly":[4],"programmable":[5],"and":[6,21,171,201],"fully":[7,105],"synthesizable":[8],"large-N":[9],"frequency":[10,38,52,57,64,139,174,193,199],"multiplier.":[11],"It":[12],"is":[13,24,41,47,58,80,92,104,126,150,167,195],"based":[14],"on":[15],"Time-Average-Frequency":[16],"Direct":[17],"Period":[18],"Synthesis":[19],"(TAF-DPS)":[20],"its":[22],"purpose":[23],"to":[25,128,153,175,178],"generate":[26],"audio":[27,187],"frequencies":[28],"in":[29,36,77,94],"HDMI":[30,190],"(high":[31],"definition":[32],"multimedia":[33],"interface)":[34],"applications":[35],"which":[37],"multiplication":[39,148],"ratio":[40,149,170],"extremely":[42],"large.":[43],"The":[44,55,72,89,102,123,133,147],"proposed":[45,134],"multiplier":[46,194],"full":[49],"digital":[50,106],"feed-forward":[51],"control":[53],"loop.":[54],"output":[56],"produced":[59],"by":[60],"performing":[61],"fractional":[63],"division":[65],"of":[66,74,87,163,181],"the":[67,78,168,179],"oscillator":[68],"clock":[69,145,188],"with":[70,159],"TAF-DPS.":[71],"source":[73],"electrical":[75],"oscillation":[76],"TAF-DPS":[79],"free-running":[82],"inverter":[83],"ring":[84],"that":[85],"consists":[86],"inverters.":[88],"novel":[90],"structure":[91,135],"implemented":[93],"TSMC":[96],"0.18":[97],"\u03bcm":[98],"1P6M":[99],"CMOS":[100],"process.":[101],"implementation":[103],"HDL":[107],"coding":[108],"\u2192":[109,111,113],"simulation":[110],"synthesis":[112],"place":[114],"&":[115],"route":[116],"without":[117],"any":[118],"need":[119],"for":[120,189,198],"analog":[121],"simulation.":[122],"hardware":[124],"cost":[125],"equivalent":[127],"3150":[129],"two-input":[130],"NAND":[131],"gates.":[132],"can":[136],"achieve":[137],"fast":[138],"switching":[140],"within":[141],"two":[142],"input":[143,161,173],"reference":[144],"cycles.":[146],"evaluated":[151],"experimentally":[152],"be":[154,176],"as":[155,157],"high":[156],"106":[158],"an":[160,186],"signal":[162],"50":[164],"Hz;":[165],"this":[166,192],"largest":[169],"lowest":[172],"reported":[177],"best":[180],"our":[182],"knowledge.":[183],"Besides":[184],"generating":[185],"applications,":[191],"very":[196],"suitable":[197],"measurements":[200],"system-on-a-chip":[202],"applications.":[203]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2021,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
