{"id":"https://openalex.org/W2947486590","doi":"https://doi.org/10.1109/tcsii.2019.2919891","title":"FPGA-Based True Random Number Generation Using Programmable Delays in Oscillator-Rings","display_name":"FPGA-Based True Random Number Generation Using Programmable Delays in Oscillator-Rings","publication_year":2019,"publication_date":"2019-05-30","ids":{"openalex":"https://openalex.org/W2947486590","doi":"https://doi.org/10.1109/tcsii.2019.2919891","mag":"2947486590"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2019.2919891","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2019.2919891","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5052226145","display_name":"N. Nalla Anandakumar","orcid":null},"institutions":[{"id":"https://openalex.org/I119939252","display_name":"Indraprastha Institute of Information Technology Delhi","ror":"https://ror.org/03vfp4g33","country_code":"IN","type":"education","lineage":["https://openalex.org/I119939252"]},{"id":"https://openalex.org/I4387152551","display_name":"Society for Electronic Transactions and Security","ror":"https://ror.org/03zdc1b30","country_code":null,"type":"nonprofit","lineage":["https://openalex.org/I4387152551"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"N. Nalla Anandakumar","raw_affiliation_strings":["Hardware Security, Society for Electronic Transactions and Security, Chennai, India","Indraprastha Institute of Information Technology Delhi, New Delhi, India"],"affiliations":[{"raw_affiliation_string":"Hardware Security, Society for Electronic Transactions and Security, Chennai, India","institution_ids":["https://openalex.org/I4387152551"]},{"raw_affiliation_string":"Indraprastha Institute of Information Technology Delhi, New Delhi, India","institution_ids":["https://openalex.org/I119939252"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015932261","display_name":"Somitra Kumar Sanadhya","orcid":"https://orcid.org/0000-0003-1046-184X"},"institutions":[{"id":"https://openalex.org/I119241673","display_name":"Indian Institute of Technology Ropar","ror":"https://ror.org/02qkhhn56","country_code":"IN","type":"education","lineage":["https://openalex.org/I119241673"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Somitra Kumar Sanadhya","raw_affiliation_strings":["Indian Institute of Technology Ropar, Rupnagar, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Ropar, Rupnagar, India","institution_ids":["https://openalex.org/I119241673"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089109424","display_name":"Mohammad Hashmi","orcid":"https://orcid.org/0000-0002-1772-588X"},"institutions":[{"id":"https://openalex.org/I119939252","display_name":"Indraprastha Institute of Information Technology Delhi","ror":"https://ror.org/03vfp4g33","country_code":"IN","type":"education","lineage":["https://openalex.org/I119939252"]},{"id":"https://openalex.org/I60559429","display_name":"Nazarbayev University","ror":"https://ror.org/052bx8q98","country_code":"KZ","type":"education","lineage":["https://openalex.org/I60559429"]}],"countries":["IN","KZ"],"is_corresponding":false,"raw_author_name":"Mohammad S. Hashmi","raw_affiliation_strings":["Indraprastha Institute of Information Technology Delhi, New Delhi, India","School of Engineering, Nazarbayev University, Astana, Kazakhstan"],"affiliations":[{"raw_affiliation_string":"Indraprastha Institute of Information Technology Delhi, New Delhi, India","institution_ids":["https://openalex.org/I119939252"]},{"raw_affiliation_string":"School of Engineering, Nazarbayev University, Astana, Kazakhstan","institution_ids":["https://openalex.org/I60559429"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5052226145"],"corresponding_institution_ids":["https://openalex.org/I119939252","https://openalex.org/I4387152551"],"apc_list":null,"apc_paid":null,"fwci":10.8899,"has_fulltext":false,"cited_by_count":118,"citation_normalized_percentile":{"value":0.99074778,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":99,"max":100},"biblio":{"volume":"67","issue":"3","first_page":"570","last_page":"574"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.989799976348877,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/random-number-generation","display_name":"Random number generation","score":0.8524800539016724},{"id":"https://openalex.org/keywords/nist","display_name":"NIST","score":0.7886470556259155},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7653242349624634},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.7069409489631653},{"id":"https://openalex.org/keywords/randomness","display_name":"Randomness","score":0.6963488459587097},{"id":"https://openalex.org/keywords/ring-oscillator","display_name":"Ring oscillator","score":0.6731316447257996},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6164310574531555},{"id":"https://openalex.org/keywords/bitstream","display_name":"Bitstream","score":0.4726632833480835},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.37931889295578003},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.34033381938934326},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.32298189401626587},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2498248815536499},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.22157660126686096},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17436784505844116},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.08324792981147766},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08127939701080322},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.07487431168556213}],"concepts":[{"id":"https://openalex.org/C201866948","wikidata":"https://www.wikidata.org/wiki/Q228206","display_name":"Random number generation","level":2,"score":0.8524800539016724},{"id":"https://openalex.org/C111219384","wikidata":"https://www.wikidata.org/wiki/Q6954384","display_name":"NIST","level":2,"score":0.7886470556259155},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7653242349624634},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.7069409489631653},{"id":"https://openalex.org/C125112378","wikidata":"https://www.wikidata.org/wiki/Q176640","display_name":"Randomness","level":2,"score":0.6963488459587097},{"id":"https://openalex.org/C104111718","wikidata":"https://www.wikidata.org/wiki/Q2153973","display_name":"Ring oscillator","level":3,"score":0.6731316447257996},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6164310574531555},{"id":"https://openalex.org/C136695289","wikidata":"https://www.wikidata.org/wiki/Q415568","display_name":"Bitstream","level":3,"score":0.4726632833480835},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.37931889295578003},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.34033381938934326},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.32298189401626587},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2498248815536499},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.22157660126686096},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17436784505844116},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.08324792981147766},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08127939701080322},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.07487431168556213},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.0},{"id":"https://openalex.org/C204321447","wikidata":"https://www.wikidata.org/wiki/Q30642","display_name":"Natural language processing","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2019.2919891","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2019.2919891","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1517403092","https://openalex.org/W1588877666","https://openalex.org/W1717406790","https://openalex.org/W1970099061","https://openalex.org/W2098644630","https://openalex.org/W2117205818","https://openalex.org/W2128457641","https://openalex.org/W2142351551","https://openalex.org/W2149404985","https://openalex.org/W2161890359","https://openalex.org/W2167352984","https://openalex.org/W2344654957","https://openalex.org/W2362080632","https://openalex.org/W2524910869","https://openalex.org/W2896286715","https://openalex.org/W3140517496","https://openalex.org/W3198310217","https://openalex.org/W4232122552","https://openalex.org/W6680861166"],"related_works":["https://openalex.org/W2910439186","https://openalex.org/W3134956345","https://openalex.org/W2773228113","https://openalex.org/W2523104764","https://openalex.org/W3004634482","https://openalex.org/W2922433876","https://openalex.org/W3084704944","https://openalex.org/W4381427530","https://openalex.org/W2610269622","https://openalex.org/W2054443616"],"abstract_inverted_index":{"True":[0],"random":[1,23,34],"number":[2],"generators":[3],"(TRNGs)":[4],"play":[5],"a":[6,15,40,97],"fundamental":[7],"role":[8],"in":[9,64,109],"cryptographic":[10],"systems.":[11],"This":[12],"brief":[13],"presents":[14],"new":[16],"and":[17,60,89,142,150],"efficient":[18],"method":[19],"to":[20,53,61,80,105],"generate":[21,54],"true":[22],"numbers":[24],"on":[25,122],"field":[26],"programmable":[27,49],"gate":[28],"array":[29],"(FPGA)":[30],"by":[31],"utilizing":[32,77],"the":[33,58,65,74,92,110,117,145],"jitter":[35,63],"of":[36,42,57,73,116,148],"free-running":[37,45],"oscillators":[38,68],"as":[39,101],"source":[41],"randomness.":[43],"The":[44,70,114,126],"oscillator":[46,87],"rings":[47],"incorporate":[48],"delay":[50],"lines":[51],"(PDLs)":[52],"large":[55],"variation":[56],"oscillations":[59],"introduce":[62],"generated":[66],"ring":[67],"clocks.":[69],"main":[71],"advantage":[72],"proposed":[75,118,127],"TRNG":[76,128],"PDLs":[78],"is":[79,103,120],"reduce":[81],"correlation":[82],"between":[83],"several":[84],"equal":[85],"length":[86],"rings,":[88],"thus":[90],"improve":[91],"randomness":[93],"qualities.":[94],"In":[95],"addition,":[96],"Von":[98],"Neumann":[99],"corrector":[100],"post-processor":[102],"employed":[104],"remove":[106],"any":[107],"bias":[108],"output":[111],"bit":[112,139],"sequence.":[113],"validation":[115],"approach":[119],"demonstrated":[121],"Xilinx":[123],"Spartan-3A":[124],"FPGAs.":[125],"occupies":[129],"528":[130],"slices,":[131],"achieves":[132],"6":[133],"Mb/s":[134],"throughput":[135],"with":[136],"0.999":[137],"per":[138],"entropy":[140],"rate,":[141],"passes":[143],"all":[144],"national":[146],"institute":[147],"standards":[149],"technology":[151],"(NIST)":[152],"statistical":[153],"tests.":[154]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":25},{"year":2024,"cited_by_count":20},{"year":2023,"cited_by_count":27},{"year":2022,"cited_by_count":17},{"year":2021,"cited_by_count":17},{"year":2020,"cited_by_count":10}],"updated_date":"2026-04-02T15:55:50.835912","created_date":"2025-10-10T00:00:00"}