{"id":"https://openalex.org/W2931301255","doi":"https://doi.org/10.1109/tcsii.2019.2907974","title":"A Resource-Efficient Multiplierless Systolic Array Architecture for Convolutions in Deep Networks","display_name":"A Resource-Efficient Multiplierless Systolic Array Architecture for Convolutions in Deep Networks","publication_year":2019,"publication_date":"2019-03-28","ids":{"openalex":"https://openalex.org/W2931301255","doi":"https://doi.org/10.1109/tcsii.2019.2907974","mag":"2931301255"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2019.2907974","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2019.2907974","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5085233695","display_name":"Yashrajsinh Parmar","orcid":null},"institutions":[{"id":"https://openalex.org/I24676775","display_name":"Indian Institute of Technology Madras","ror":"https://ror.org/03v0r5n49","country_code":"IN","type":"facility","lineage":["https://openalex.org/I24676775"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Yashrajsinh Parmar","raw_affiliation_strings":["Indian Institute of Technology Madras, Chennai, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Madras, Chennai, India","institution_ids":["https://openalex.org/I24676775"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008124905","display_name":"K. Sridharan","orcid":null},"institutions":[{"id":"https://openalex.org/I24676775","display_name":"Indian Institute of Technology Madras","ror":"https://ror.org/03v0r5n49","country_code":"IN","type":"facility","lineage":["https://openalex.org/I24676775"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"K. Sridharan","raw_affiliation_strings":["Indian Institute of Technology Madras, Chennai, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Madras, Chennai, India","institution_ids":["https://openalex.org/I24676775"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5085233695"],"corresponding_institution_ids":["https://openalex.org/I24676775"],"apc_list":null,"apc_paid":null,"fwci":2.4293,"has_fulltext":false,"cited_by_count":38,"citation_normalized_percentile":{"value":0.91345601,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":91,"max":99},"biblio":{"volume":"67","issue":"2","first_page":"370","last_page":"374"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6906591653823853},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6857905983924866},{"id":"https://openalex.org/keywords/systolic-array","display_name":"Systolic array","score":0.6235328912734985},{"id":"https://openalex.org/keywords/convolution","display_name":"Convolution (computer science)","score":0.5918881893157959},{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.5575660467147827},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5566674470901489},{"id":"https://openalex.org/keywords/convolutional-neural-network","display_name":"Convolutional neural network","score":0.4854770004749298},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.4815845489501953},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.45358896255493164},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.445254385471344},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4128960967063904},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.41076022386550903},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3987308442592621},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3753332197666168},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.33277273178100586},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3215659260749817},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1951049268245697},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.18440592288970947}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6906591653823853},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6857905983924866},{"id":"https://openalex.org/C150741067","wikidata":"https://www.wikidata.org/wiki/Q2377218","display_name":"Systolic array","level":3,"score":0.6235328912734985},{"id":"https://openalex.org/C45347329","wikidata":"https://www.wikidata.org/wiki/Q5166604","display_name":"Convolution (computer science)","level":3,"score":0.5918881893157959},{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.5575660467147827},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5566674470901489},{"id":"https://openalex.org/C81363708","wikidata":"https://www.wikidata.org/wiki/Q17084460","display_name":"Convolutional neural network","level":2,"score":0.4854770004749298},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.4815845489501953},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.45358896255493164},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.445254385471344},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4128960967063904},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.41076022386550903},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3987308442592621},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3753332197666168},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.33277273178100586},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3215659260749817},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1951049268245697},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.18440592288970947},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2019.2907974","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2019.2907974","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5699999928474426,"display_name":"Decent work and economic growth","id":"https://metadata.un.org/sdg/8"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1584008964","https://openalex.org/W1686810756","https://openalex.org/W1849277567","https://openalex.org/W2097117768","https://openalex.org/W2103110226","https://openalex.org/W2112796928","https://openalex.org/W2115452265","https://openalex.org/W2118949348","https://openalex.org/W2194775991","https://openalex.org/W2285660444","https://openalex.org/W2289252105","https://openalex.org/W2604177858","https://openalex.org/W2616014673","https://openalex.org/W2766143712","https://openalex.org/W2767644592","https://openalex.org/W2767737961","https://openalex.org/W2768993447","https://openalex.org/W2807127337","https://openalex.org/W2889015088","https://openalex.org/W4210830821","https://openalex.org/W6637373629","https://openalex.org/W6639204139"],"related_works":["https://openalex.org/W2355622827","https://openalex.org/W2038682752","https://openalex.org/W2592499194","https://openalex.org/W2142131433","https://openalex.org/W2390807153","https://openalex.org/W2529830312","https://openalex.org/W2739720767","https://openalex.org/W2105613219","https://openalex.org/W2156483123","https://openalex.org/W2188055041"],"abstract_inverted_index":{"This":[0],"brief":[1],"presents":[2],"a":[3,16,77,82],"resource-efficient":[4],"VLSI":[5],"architecture":[6,113],"for":[7],"convolution":[8,61,67],"operations":[9],"in":[10,23,43,128,135],"deep":[11],"networks.":[12],"Taking":[13],"advantage":[14],"of":[15,18,60,110],"feature":[17],"the":[19,29,36,50,66,71,111,129],"max":[20],"pooling":[21],"layer":[22],"classical":[24],"convolutional":[25],"neural":[26],"networks":[27],"(CNNs),":[28],"image":[30],"pixels":[31],"are":[32,39,53],"scaled":[33],"such":[34],"that":[35],"weight":[37,51],"values":[38],"constrained":[40],"to":[41,87,91,139],"lie":[42],"[-1,":[44],"+1]":[45],"range.":[46],"Under":[47],"this":[48],"constraint,":[49],"parameters":[52],"chosen":[54],"as":[55],"trigonometric":[56],"functions,":[57],"enabling":[58],"realization":[59],"without":[62],"multipliers.":[63],"In":[64],"particular,":[65],"is":[68],"realized":[69],"using":[70],"CORDIC":[72],"algorithm.":[73],"We":[74],"also":[75],"propose":[76],"dataflow":[78],"model":[79],"based":[80],"on":[81,114],"reconfigurable":[83],"systolic":[84],"ring":[85],"array":[86],"achieve":[88],"performance":[89],"comparable":[90],"contemporary":[92],"CNN":[93],"architectures":[94],"but":[95],"with":[96,124],"substantially":[97],"less":[98],"hardware,":[99],"high":[100],"resource":[101,122],"utilization":[102],"efficiency,":[103,123],"and":[104,132],"reduced":[105],"power":[106,136],"consumption.":[107],"FPGA":[108],"implementation":[109],"proposed":[112],"Xilinx":[115],"Virtex-5":[116],"XC5VLX5OT":[117],"achieves":[118],"roughly":[119],"55%":[120,133],"higher":[121],"approximately":[125],"53%":[126],"reduction":[127,134],"slice-delay":[130],"product":[131],"consumption":[137],"compared":[138],"recent":[140],"architectures.":[141]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":9},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":13},{"year":2020,"cited_by_count":6}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
