{"id":"https://openalex.org/W2897880524","doi":"https://doi.org/10.1109/tcsii.2018.2875334","title":"Itemization and Track Limitations of Fan-Out-Free Functions for Static CMOS Functional Cells","display_name":"Itemization and Track Limitations of Fan-Out-Free Functions for Static CMOS Functional Cells","publication_year":2018,"publication_date":"2018-10-10","ids":{"openalex":"https://openalex.org/W2897880524","doi":"https://doi.org/10.1109/tcsii.2018.2875334","mag":"2897880524"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2018.2875334","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2018.2875334","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5033425088","display_name":"John Brunhaver","orcid":"https://orcid.org/0000-0002-0156-9392"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"John Brunhaver","raw_affiliation_strings":["School of Electrical, Computer, Energy Engineering, Arizona State University, Tempe, AZ, USA"],"raw_orcid":"https://orcid.org/0000-0002-0156-9392","affiliations":[{"raw_affiliation_string":"School of Electrical, Computer, Energy Engineering, Arizona State University, Tempe, AZ, USA","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017224335","display_name":"Richard Uhrie","orcid":"https://orcid.org/0000-0001-5493-2194"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Richard Uhrie","raw_affiliation_strings":["School of Electrical, Computer, Energy Engineering, Arizona State University, Tempe, AZ, USA"],"raw_orcid":"https://orcid.org/0000-0001-5493-2194","affiliations":[{"raw_affiliation_string":"School of Electrical, Computer, Energy Engineering, Arizona State University, Tempe, AZ, USA","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5015329523","display_name":"Lawrence T. Clark","orcid":"https://orcid.org/0000-0001-7741-6512"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Lawrence T. Clark","raw_affiliation_strings":["School of Electrical, Computer, Energy Engineering, Arizona State University, Tempe, AZ, USA"],"raw_orcid":"https://orcid.org/0000-0001-7741-6512","affiliations":[{"raw_affiliation_string":"School of Electrical, Computer, Energy Engineering, Arizona State University, Tempe, AZ, USA","institution_ids":["https://openalex.org/I55732556"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I55732556"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.1084883,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"66","issue":"7","first_page":"1164","last_page":"1168"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/boolean-function","display_name":"Boolean function","score":0.7360996603965759},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6549419164657593},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.6546871066093445},{"id":"https://openalex.org/keywords/limit","display_name":"Limit (mathematics)","score":0.6013848185539246},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5885894298553467},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5505830645561218},{"id":"https://openalex.org/keywords/function","display_name":"Function (biology)","score":0.5374619960784912},{"id":"https://openalex.org/keywords/listing","display_name":"Listing (finance)","score":0.5332750082015991},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.46196621656417847},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.40816065669059753},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.39104706048965454},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.33893364667892456},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.213743656873703},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19736194610595703},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.17565694451332092},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.14239004254341125}],"concepts":[{"id":"https://openalex.org/C187455244","wikidata":"https://www.wikidata.org/wiki/Q942353","display_name":"Boolean function","level":2,"score":0.7360996603965759},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6549419164657593},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.6546871066093445},{"id":"https://openalex.org/C151201525","wikidata":"https://www.wikidata.org/wiki/Q177239","display_name":"Limit (mathematics)","level":2,"score":0.6013848185539246},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5885894298553467},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5505830645561218},{"id":"https://openalex.org/C14036430","wikidata":"https://www.wikidata.org/wiki/Q3736076","display_name":"Function (biology)","level":2,"score":0.5374619960784912},{"id":"https://openalex.org/C2779820595","wikidata":"https://www.wikidata.org/wiki/Q798505","display_name":"Listing (finance)","level":2,"score":0.5332750082015991},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.46196621656417847},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.40816065669059753},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.39104706048965454},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.33893364667892456},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.213743656873703},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19736194610595703},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.17565694451332092},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.14239004254341125},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C78458016","wikidata":"https://www.wikidata.org/wiki/Q840400","display_name":"Evolutionary biology","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C10138342","wikidata":"https://www.wikidata.org/wiki/Q43015","display_name":"Finance","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2018.2875334","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2018.2875334","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320309835","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W615514104","https://openalex.org/W1987067207","https://openalex.org/W2008521268","https://openalex.org/W2020646752","https://openalex.org/W2035501710","https://openalex.org/W2051394940","https://openalex.org/W2065093317","https://openalex.org/W2097303307","https://openalex.org/W2099412608","https://openalex.org/W2346205343","https://openalex.org/W2595225635","https://openalex.org/W4235145438","https://openalex.org/W4244318636","https://openalex.org/W6663391026","https://openalex.org/W6734649425"],"related_works":["https://openalex.org/W3090875125","https://openalex.org/W2143608234","https://openalex.org/W88258363","https://openalex.org/W4200577934","https://openalex.org/W2119373721","https://openalex.org/W2134385741","https://openalex.org/W2604690070","https://openalex.org/W2085308054","https://openalex.org/W4380610161","https://openalex.org/W98108296"],"abstract_inverted_index":{"The":[0],"inverting":[1],"subset":[2],"of":[3,10,47,78,96,100],"fan-out-free":[4],"boolean":[5],"functions":[6,30,74],"describe":[7],"the":[8,86,94,109],"majority":[9],"implementable":[11],"single-output":[12],"combinatorial":[13],"static":[14],"CMOS":[15],"gates.":[16],"Given":[17],"that":[18],"each":[19],"function":[20],"has":[21],"many":[22,46],"expressions,":[23],"a":[24,51,68,97],"method":[25,69],"for":[26,70],"uniquely":[27],"identifying":[28],"these":[29,48,101],"is":[31],"presented":[32],"and":[33,40,75,105],"used":[34],"to":[35,59],"determine":[36],"complements.":[37],"A":[38],"large":[39,98],"rich":[41],"standard":[42],"cell":[43,63,83],"library":[44],"incorporates":[45],"functions,":[49],"but":[50],"reduction":[52,111],"in":[53,81,89,112],"cell-height":[54],"limits":[55],"their":[56,79,106],"inclusion":[57],"due":[58],"constraints":[60,88],"on":[61,108],"internal":[62],"routing.":[64],"This":[65],"brief":[66],"presents":[67],"listing":[71],"all":[72],"such":[73],"rapid":[76],"analysis":[77],"viability":[80],"different":[82],"heights.":[84],"Finally,":[85],"design":[87],"advanced":[90],"technology":[91],"nodes":[92],"limit":[93],"utility":[95],"number":[99],"functions.":[102],"Those":[103],"limitations":[104],"impact":[107],"resulting":[110],"feasible":[113],"cells":[114],"are":[115],"also":[116],"described.":[117]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
