{"id":"https://openalex.org/W2896447986","doi":"https://doi.org/10.1109/tcsii.2018.2874940","title":"Design and Implementation of 5-D IIR Depth Velocity Filters for Light Field Video Processing","display_name":"Design and Implementation of 5-D IIR Depth Velocity Filters for Light Field Video Processing","publication_year":2018,"publication_date":"2018-10-09","ids":{"openalex":"https://openalex.org/W2896447986","doi":"https://doi.org/10.1109/tcsii.2018.2874940","mag":"2896447986"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2018.2874940","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2018.2874940","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5011449810","display_name":"Chamith Wijenayake","orcid":"https://orcid.org/0000-0002-2070-1010"},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":true,"raw_author_name":"C. Wijenayake","raw_affiliation_strings":["School of Electrical Engineering, University of New South Wales, Sydney, NSW, Australia"],"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, University of New South Wales, Sydney, NSW, Australia","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007561382","display_name":"Namalka Liyanage","orcid":null},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"N. Liyanage","raw_affiliation_strings":["School of Electrical Engineering, University of New South Wales, Sydney, NSW, Australia"],"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, University of New South Wales, Sydney, NSW, Australia","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002715266","display_name":"Chamira U. S. Edussooriya","orcid":"https://orcid.org/0000-0001-6715-6198"},"institutions":[{"id":"https://openalex.org/I195740183","display_name":"University of Moratuwa","ror":"https://ror.org/0491f5305","country_code":"LK","type":"education","lineage":["https://openalex.org/I195740183"]}],"countries":["LK"],"is_corresponding":false,"raw_author_name":"C. U. S. Edussooriya","raw_affiliation_strings":["Department of Electronic and Telecommunication Engineering, University of Moratuwa, Moratuwa, Sri Lanka"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Telecommunication Engineering, University of Moratuwa, Moratuwa, Sri Lanka","institution_ids":["https://openalex.org/I195740183"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032371393","display_name":"H. Seatang","orcid":null},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"H. Seatang","raw_affiliation_strings":["School of Electrical Engineering, University of New South Wales, Sydney, NSW, Australia"],"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, University of New South Wales, Sydney, NSW, Australia","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052682615","display_name":"P. Agathoklis","orcid":"https://orcid.org/0000-0002-2897-0549"},"institutions":[{"id":"https://openalex.org/I212119943","display_name":"University of Victoria","ror":"https://ror.org/04s5mat29","country_code":"CA","type":"education","lineage":["https://openalex.org/I212119943"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"P. Agathoklis","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Victoria, Victoria, BC, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Victoria, Victoria, BC, Canada","institution_ids":["https://openalex.org/I212119943"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111429082","display_name":"L.T. Bruton","orcid":null},"institutions":[{"id":"https://openalex.org/I168635309","display_name":"University of Calgary","ror":"https://ror.org/03yjb2x39","country_code":"CA","type":"education","lineage":["https://openalex.org/I168635309"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"L. T. Bruton","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Calgary, Calgary, AB, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Calgary, Calgary, AB, Canada","institution_ids":["https://openalex.org/I168635309"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5011449810"],"corresponding_institution_ids":["https://openalex.org/I31746571"],"apc_list":null,"apc_paid":null,"fwci":1.0446,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.82593053,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"66","issue":"7","first_page":"1267","last_page":"1271"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11105","display_name":"Advanced Image Processing Techniques","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/infinite-impulse-response","display_name":"Infinite impulse response","score":0.8369449973106384},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7899419069290161},{"id":"https://openalex.org/keywords/2d-filters","display_name":"2D Filters","score":0.6588585376739502},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6551104187965393},{"id":"https://openalex.org/keywords/matlab","display_name":"MATLAB","score":0.6168596148490906},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.5627588033676147},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5254387259483337},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5202149748802185},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.5175439715385437},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.4740088880062103},{"id":"https://openalex.org/keywords/finite-impulse-response","display_name":"Finite impulse response","score":0.470925509929657},{"id":"https://openalex.org/keywords/digital-filter","display_name":"Digital filter","score":0.4608916640281677},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.45800256729125977},{"id":"https://openalex.org/keywords/computational-science","display_name":"Computational science","score":0.3746633529663086},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3332287669181824},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.22520571947097778},{"id":"https://openalex.org/keywords/computer-vision","display_name":"Computer vision","score":0.18800944089889526},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09719759225845337}],"concepts":[{"id":"https://openalex.org/C183816354","wikidata":"https://www.wikidata.org/wiki/Q665617","display_name":"Infinite impulse response","level":4,"score":0.8369449973106384},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7899419069290161},{"id":"https://openalex.org/C100106864","wikidata":"https://www.wikidata.org/wiki/Q16001029","display_name":"2D Filters","level":5,"score":0.6588585376739502},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6551104187965393},{"id":"https://openalex.org/C2780365114","wikidata":"https://www.wikidata.org/wiki/Q169478","display_name":"MATLAB","level":2,"score":0.6168596148490906},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.5627588033676147},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5254387259483337},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5202149748802185},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.5175439715385437},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.4740088880062103},{"id":"https://openalex.org/C198386975","wikidata":"https://www.wikidata.org/wiki/Q117785","display_name":"Finite impulse response","level":2,"score":0.470925509929657},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.4608916640281677},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.45800256729125977},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.3746633529663086},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3332287669181824},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.22520571947097778},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.18800944089889526},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09719759225845337},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2018.2874940","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2018.2874940","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.4699999988079071}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1502663832","https://openalex.org/W1584220632","https://openalex.org/W1979177351","https://openalex.org/W2012303138","https://openalex.org/W2054833818","https://openalex.org/W2063366997","https://openalex.org/W2097166620","https://openalex.org/W2099652181","https://openalex.org/W2113642013","https://openalex.org/W2136733503","https://openalex.org/W2138879089","https://openalex.org/W2161119306","https://openalex.org/W2525516811"],"related_works":["https://openalex.org/W2142009384","https://openalex.org/W2810377961","https://openalex.org/W2792998903","https://openalex.org/W1511779429","https://openalex.org/W762710671","https://openalex.org/W4313296775","https://openalex.org/W3208746183","https://openalex.org/W2154498341","https://openalex.org/W2067519269","https://openalex.org/W2031892245"],"abstract_inverted_index":{"The":[0,23],"design":[1,25],"and":[2,65,80,104],"hardware":[3,54,75],"implementation":[4,55],"of":[5,46,60,88,97,111],"a":[6,29,68],"low-complexity":[7],"signal":[8],"processing":[9,86],"algorithm":[10],"is":[11,26,56,63,92],"proposed":[12,24],"for":[13,107],"real-time":[14,85],"depth-velocity":[15],"filtering":[16],"in":[17],"5-D":[18,31],"light":[19],"field":[20],"videos":[21],"(LFVs).":[22],"based":[27],"on":[28,67],"stable":[30],"infinite":[32],"impulse":[33],"response":[34],"digital":[35],"filter":[36,62,99],"having":[37],"three":[38],"cascaded":[39],"sections,":[40],"each":[41,95],"synthesized":[42],"using":[43,73],"the":[44,61,98],"concept":[45],"multidimensional":[47],"passive":[48],"network":[49],"resonance.":[50],"A":[51,84],"novel":[52],"semi-systolic":[53],"proposed.":[57],"Each":[58],"section":[59,96],"implemented":[64],"tested":[66],"Xilinx":[69],"Virtex-7":[70],"FPGA":[71],"platform":[72],"MATLAB-based":[74],"co-simulation":[76],"with":[77,94],"both":[78],"synthetic":[79],"real":[81],"LFV":[82,90,109],"signals.":[83],"throughput":[87],"467":[89],"frames/s":[91],"implied":[93],"operating":[100],"at":[101],"204,":[102],"164,":[103],"115":[105],"MHz":[106],"input":[108],"frames":[110],"size":[112],"9":[113,115],"\u00d7":[114,116,118],"220":[117],"360.":[119]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
