{"id":"https://openalex.org/W2794594797","doi":"https://doi.org/10.1109/tcsii.2018.2820181","title":"A 16 mW 250 ps Double-Hit-Resolution Input-Sampled Time-to-Digital Converter in 45-nm CMOS","display_name":"A 16 mW 250 ps Double-Hit-Resolution Input-Sampled Time-to-Digital Converter in 45-nm CMOS","publication_year":2018,"publication_date":"2018-03-28","ids":{"openalex":"https://openalex.org/W2794594797","doi":"https://doi.org/10.1109/tcsii.2018.2820181","mag":"2794594797"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2018.2820181","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2018.2820181","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101442025","display_name":"Sami Ur Rehman","orcid":"https://orcid.org/0000-0002-7261-0268"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Sami Ur Rehman","raw_affiliation_strings":["Chair of Circuit Design and Network Theory, Technische Universit\u00e4t Dresden, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Chair of Circuit Design and Network Theory, Technische Universit\u00e4t Dresden, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017988394","display_name":"Mohammad Mahdi Khafaji","orcid":"https://orcid.org/0000-0003-0044-3074"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Mohammad Mahdi Khafaji","raw_affiliation_strings":["Chair of Circuit Design and Network Theory, Technische Universit\u00e4t Dresden, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Chair of Circuit Design and Network Theory, Technische Universit\u00e4t Dresden, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015909764","display_name":"Corrado Carta","orcid":"https://orcid.org/0000-0001-9147-0160"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Corrado Carta","raw_affiliation_strings":["Chair of Circuit Design and Network Theory, Technische Universit\u00e4t Dresden, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Chair of Circuit Design and Network Theory, Technische Universit\u00e4t Dresden, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5049816054","display_name":"Frank Ellinger","orcid":"https://orcid.org/0000-0001-6714-0479"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Frank Ellinger","raw_affiliation_strings":["Chair of Circuit Design and Network Theory, Technische Universit\u00e4t Dresden, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Chair of Circuit Design and Network Theory, Technische Universit\u00e4t Dresden, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5101442025"],"corresponding_institution_ids":["https://openalex.org/I78650965"],"apc_list":null,"apc_paid":null,"fwci":1.545,"has_fulltext":false,"cited_by_count":27,"citation_normalized_percentile":{"value":0.83596642,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":98},"biblio":{"volume":"65","issue":"5","first_page":"562","last_page":"566"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9948999881744385,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6513052582740784},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5627433061599731},{"id":"https://openalex.org/keywords/time-to-digital-converter","display_name":"Time-to-digital converter","score":0.5289076566696167},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.45150789618492126},{"id":"https://openalex.org/keywords/dynamic-range","display_name":"Dynamic range","score":0.4292775094509125},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.42330506443977356},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4095853567123413},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3814668357372284},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3595391511917114},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.28536808490753174},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.24529841542243958},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.187283456325531},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1847839057445526},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.15134236216545105},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.13927960395812988},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.08976370096206665}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6513052582740784},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5627433061599731},{"id":"https://openalex.org/C99594498","wikidata":"https://www.wikidata.org/wiki/Q2434524","display_name":"Time-to-digital converter","level":4,"score":0.5289076566696167},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.45150789618492126},{"id":"https://openalex.org/C87133666","wikidata":"https://www.wikidata.org/wiki/Q1161699","display_name":"Dynamic range","level":2,"score":0.4292775094509125},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.42330506443977356},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4095853567123413},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3814668357372284},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3595391511917114},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.28536808490753174},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.24529841542243958},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.187283456325531},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1847839057445526},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.15134236216545105},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.13927960395812988},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.08976370096206665}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2018.2820181","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2018.2820181","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.6700000166893005,"id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G750616153","display_name":null,"funder_award_id":"1120807","funder_id":"https://openalex.org/F4320320879","funder_display_name":"Deutsche Forschungsgemeinschaft"}],"funders":[{"id":"https://openalex.org/F4320320879","display_name":"Deutsche Forschungsgemeinschaft","ror":"https://ror.org/018mejw64"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W2015875528","https://openalex.org/W2039207251","https://openalex.org/W2070137438","https://openalex.org/W2096548483","https://openalex.org/W2138616926","https://openalex.org/W2141767635","https://openalex.org/W2164002677","https://openalex.org/W2164964876","https://openalex.org/W2202113875","https://openalex.org/W4301908153"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W3158414702","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W4386230336","https://openalex.org/W4306968100","https://openalex.org/W2171986175","https://openalex.org/W2089791793","https://openalex.org/W2038858740","https://openalex.org/W2995582362"],"abstract_inverted_index":{"Several":[0],"new":[1],"approaches":[2],"for":[3,166],"multi-hit":[4],"delay-line-based":[5],"time-to-digital":[6],"converters":[7],"(TDCs)":[8],"are":[9,69],"discussed":[10],"and":[11,110,144],"an":[12,31],"input-sampled":[13],"TDC":[14,23,103],"architecture":[15,120],"is":[16,24,145,159],"realized":[17],"in":[18,164],"45-nm":[19],"SOI":[20],"CMOS.":[21],"The":[22,85,102,126],"characterized":[25],"by":[26,72],"applying":[27],"a":[28,49,73,91,105,153],"pseudo-random-bit-sequence":[29],"as":[30],"input":[32,47,58],"signal,":[33],"which":[34,68,158],"consists":[35],"of":[36,82,93,107,114,132,137,147,155],"multiple":[37],"time-events/hits.":[38],"Each":[39],"low":[40],"or":[41],"high":[42],"transition":[43],"inside":[44],"the":[45,55,61,80,83,95,111,115,160],"binary":[46],"represents":[48],"time-event":[50,56],"to":[51,79,121],"be":[52],"recorded.":[53],"As":[54],"carrying":[57],"travels":[59],"through":[60],"delay-line,":[62],"it":[63],"generates":[64],"its":[65],"delayed":[66],"phases,":[67],"then":[70],"sampled":[71,87],"reference":[74],"clock":[75,100],"with":[76],"period":[77],"equal":[78],"delay":[81],"delay-line.":[84],"resulting":[86],"digital":[88],"word":[89],"contains":[90],"snapshot":[92],"all":[94],"time-events":[96],"occurring":[97],"within":[98],"one":[99],"period.":[101],"achieves":[104],"time-resolution":[106],"25":[108],"ps":[109],"continuous":[112],"sampling":[113],"delay-line":[116],"allows":[117],"this":[118],"unique":[119],"achieve":[122],"ideally":[123],"unlimited":[124],"dynamic-range.":[125],"prototype":[127],"circuit":[128],"dissipates":[129],"16":[130],"mW":[131],"power,":[133],"occupies":[134],"silicon":[135],"area":[136],"0.36":[138],"mm":[139],"<sup":[140],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[141],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[142],",":[143],"capable":[146],"detecting":[148],"two":[149],"consecutive":[150],"time-events/transitions":[151],"at":[152],"distance":[154],"250":[156],"ps,":[157],"best":[161],"double-hit-resolution":[162],"reported":[163],"literature":[165],"any":[167],"TDC.":[168]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}