{"id":"https://openalex.org/W2769027832","doi":"https://doi.org/10.1109/tcsii.2017.2775243","title":"A Mismatch-Immune 12-Bit SAR ADC With Completely Reconfigurable Capacitor DAC","display_name":"A Mismatch-Immune 12-Bit SAR ADC With Completely Reconfigurable Capacitor DAC","publication_year":2017,"publication_date":"2017-11-20","ids":{"openalex":"https://openalex.org/W2769027832","doi":"https://doi.org/10.1109/tcsii.2017.2775243","mag":"2769027832"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2017.2775243","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2017.2775243","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102897223","display_name":"Nicholas Collins","orcid":"https://orcid.org/0000-0002-9138-9212"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Nicholas Collins","raw_affiliation_strings":["Michigan Integrated Circuits Laboratory, University of Michigan, Ann Arbor, MI, USA"],"affiliations":[{"raw_affiliation_string":"Michigan Integrated Circuits Laboratory, University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055710808","display_name":"Andres A. Tamez","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Andres Tamez","raw_affiliation_strings":["Department of Hardware Design, Coherix, Inc., Ann Arbor, MI, USA"],"affiliations":[{"raw_affiliation_string":"Department of Hardware Design, Coherix, Inc., Ann Arbor, MI, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022571725","display_name":"Lu Jie","orcid":"https://orcid.org/0000-0001-5046-3917"},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lu Jie","raw_affiliation_strings":["Department of Electrical Engineering, Zhejiang University, Hangzhou, China"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023735980","display_name":"Jorge Pernillo","orcid":null},"institutions":[{"id":"https://openalex.org/I4210117556","display_name":"Inphi (United States)","ror":"https://ror.org/027szw220","country_code":"US","type":"company","lineage":["https://openalex.org/I4210117556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jorge Pernillo","raw_affiliation_strings":["Department of High Speed Data Converters, Inphi, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of High Speed Data Converters, Inphi, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I4210117556"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5005810864","display_name":"Michael P. Flynn","orcid":"https://orcid.org/0000-0001-5070-7512"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael P. Flynn","raw_affiliation_strings":["Michigan Integrated Circuits Laboratory, University of Michigan, Ann Arbor, MI, USA"],"affiliations":[{"raw_affiliation_string":"Michigan Integrated Circuits Laboratory, University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5102897223"],"corresponding_institution_ids":["https://openalex.org/I27837315"],"apc_list":null,"apc_paid":null,"fwci":0.2549,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.56015179,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":96},"biblio":{"volume":"65","issue":"11","first_page":"1589","last_page":"1593"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.8424861431121826},{"id":"https://openalex.org/keywords/effective-number-of-bits","display_name":"Effective number of bits","score":0.7815662622451782},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.754279613494873},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.6058889627456665},{"id":"https://openalex.org/keywords/12-bit","display_name":"12-bit","score":0.5135236382484436},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5123425722122192},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4923595190048218},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.47359541058540344},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.37084710597991943},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.24579113721847534},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19914460182189941},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1354646384716034},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.08100125193595886}],"concepts":[{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.8424861431121826},{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.7815662622451782},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.754279613494873},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.6058889627456665},{"id":"https://openalex.org/C2776310492","wikidata":"https://www.wikidata.org/wiki/Q3271420","display_name":"12-bit","level":3,"score":0.5135236382484436},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5123425722122192},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4923595190048218},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.47359541058540344},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.37084710597991943},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.24579113721847534},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19914460182189941},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1354646384716034},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.08100125193595886},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2017.2775243","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2017.2775243","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1969286095","https://openalex.org/W1982704180","https://openalex.org/W2022856781","https://openalex.org/W2025975976","https://openalex.org/W2102190025","https://openalex.org/W2107423283","https://openalex.org/W2140823559","https://openalex.org/W2159346009","https://openalex.org/W2166870582","https://openalex.org/W6657002267","https://openalex.org/W6675414269"],"related_works":["https://openalex.org/W4386387962","https://openalex.org/W2593119273","https://openalex.org/W4385956114","https://openalex.org/W2747582581","https://openalex.org/W2008952700","https://openalex.org/W2593068112","https://openalex.org/W3156142317","https://openalex.org/W4297513244","https://openalex.org/W2783221760","https://openalex.org/W169064491"],"abstract_inverted_index":{"We":[0,25,35],"overcome":[1],"mismatch":[2],"constraints":[3],"of":[4,22,46],"capacitor":[5],"DAC":[6,15],"design":[7],"in":[8,31],"SAR":[9],"ADCs":[10],"using":[11],"a":[12,27,37,44],"completely":[13],"reconfigurable":[14],"with":[16,43],"content":[17],"addressable":[18],"memory":[19],"beneath":[20],"groupings":[21],"unit":[23],"capacitors.":[24],"demonstrate":[26],"linearity":[28],"optimization":[29],"technique":[30],"simulation":[32],"and":[33],"measurement.":[34],"achieve":[36],"nearly":[38],"2-bit":[39],"repeatable":[40],"ENOB":[41],"improvement":[42],"peak":[45],"11.3":[47],"bits.":[48]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2020,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}