{"id":"https://openalex.org/W2609578273","doi":"https://doi.org/10.1109/tcsii.2017.2698479","title":"A Multi-Chain Merged Tapped Delay Line for High Precision Time-to-Digital Converters in FPGAs","display_name":"A Multi-Chain Merged Tapped Delay Line for High Precision Time-to-Digital Converters in FPGAs","publication_year":2017,"publication_date":"2017-04-27","ids":{"openalex":"https://openalex.org/W2609578273","doi":"https://doi.org/10.1109/tcsii.2017.2698479","mag":"2609578273"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2017.2698479","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2017.2698479","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100334350","display_name":"Yonggang Wang","orcid":"https://orcid.org/0000-0002-4204-0073"},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yonggang Wang","raw_affiliation_strings":["Department of Modern Physics, University of Science and Technology of China, Hefei, China"],"raw_orcid":"https://orcid.org/0000-0002-4204-0073","affiliations":[{"raw_affiliation_string":"Department of Modern Physics, University of Science and Technology of China, Hefei, China","institution_ids":["https://openalex.org/I126520041"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103093710","display_name":"Qiang Cao","orcid":"https://orcid.org/0000-0001-9004-7539"},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qiang Cao","raw_affiliation_strings":["Department of Modern Physics, University of Science and Technology of China, Hefei, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Modern Physics, University of Science and Technology of China, Hefei, China","institution_ids":["https://openalex.org/I126520041"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100412224","display_name":"Chong Liu","orcid":"https://orcid.org/0000-0001-6953-3612"},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chong Liu","raw_affiliation_strings":["Department of Modern Physics, University of Science and Technology of China, Hefei, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Modern Physics, University of Science and Technology of China, Hefei, China","institution_ids":["https://openalex.org/I126520041"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I126520041"],"apc_list":null,"apc_paid":null,"fwci":1.2672,"has_fulltext":false,"cited_by_count":52,"citation_normalized_percentile":{"value":0.80931477,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":"65","issue":"1","first_page":"96","last_page":"100"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9962000250816345,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8134357333183289},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6533079147338867},{"id":"https://openalex.org/keywords/time-to-digital-converter","display_name":"Time-to-digital converter","score":0.5955754518508911},{"id":"https://openalex.org/keywords/interpolation","display_name":"Interpolation (computer graphics)","score":0.5047422647476196},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.49796628952026367},{"id":"https://openalex.org/keywords/decimation","display_name":"Decimation","score":0.47025975584983826},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.46364083886146545},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4461360275745392},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.4183269739151001},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.4148638844490051},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3291333019733429},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.2773258090019226},{"id":"https://openalex.org/keywords/frame","display_name":"Frame (networking)","score":0.22658389806747437},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16772979497909546},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16146647930145264},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.12862682342529297},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.10632115602493286}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8134357333183289},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6533079147338867},{"id":"https://openalex.org/C99594498","wikidata":"https://www.wikidata.org/wiki/Q2434524","display_name":"Time-to-digital converter","level":4,"score":0.5955754518508911},{"id":"https://openalex.org/C137800194","wikidata":"https://www.wikidata.org/wiki/Q11713455","display_name":"Interpolation (computer graphics)","level":3,"score":0.5047422647476196},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.49796628952026367},{"id":"https://openalex.org/C173642442","wikidata":"https://www.wikidata.org/wiki/Q1253346","display_name":"Decimation","level":3,"score":0.47025975584983826},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.46364083886146545},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4461360275745392},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.4183269739151001},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.4148638844490051},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3291333019733429},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.2773258090019226},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.22658389806747437},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16772979497909546},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16146647930145264},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.12862682342529297},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.10632115602493286},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2017.2698479","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2017.2698479","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5899999737739563,"display_name":"Decent work and economic growth","id":"https://metadata.un.org/sdg/8"}],"awards":[{"id":"https://openalex.org/G5410154660","display_name":null,"funder_award_id":"11475168","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G5732688759","display_name":null,"funder_award_id":"11275194","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1615624772","https://openalex.org/W1968650434","https://openalex.org/W1971772932","https://openalex.org/W2006777860","https://openalex.org/W2024191196","https://openalex.org/W2130040053","https://openalex.org/W2134814047","https://openalex.org/W2164964876","https://openalex.org/W2494646569","https://openalex.org/W2547517791","https://openalex.org/W2555253653","https://openalex.org/W6656570874","https://openalex.org/W6729989905"],"related_works":["https://openalex.org/W2389685791","https://openalex.org/W2901028619","https://openalex.org/W2014165129","https://openalex.org/W2367348190","https://openalex.org/W594316872","https://openalex.org/W2367794224","https://openalex.org/W2072850836","https://openalex.org/W2017163657","https://openalex.org/W2831860248","https://openalex.org/W3195700791"],"abstract_inverted_index":{"Field":[0],"programmable":[1],"gate":[2],"array":[3],"(FPGA)-based":[4],"time-to-digital":[5],"converters":[6],"(TDCs)":[7],"use":[8],"a":[9,19,46,72,113],"tapped":[10],"delay":[11,28,40,54],"line":[12],"(TDL)":[13],"for":[14,160],"time":[15,21,35,79],"interpolation":[16,80],"to":[17,56,124],"yield":[18],"sub-clock":[20],"resolution.":[22],"The":[23,63,146],"granularity":[24],"and":[25,105,142,170],"uniformity":[26,64],"of":[27,65,131],"cells":[29,41],"in":[30,42,112,119,167],"TDL":[31,48,83,96,153],"determines":[32],"achievable":[33],"TDC":[34,100,133,162],"precision.":[36],"To":[37,88],"gain":[38],"small":[39],"TDL,":[43],"we":[44],"propose":[45],"new":[47,95],"architecture":[49,154],"by":[50,71],"merging":[51],"multiple":[52],"conventional":[53],"chains":[55],"obtain":[57],"very":[58],"fine":[59],"intrinsic":[60],"cell":[61,67],"delays.":[62],"these":[66,132],"delays":[68],"is":[69,155],"improved":[70],"bin":[73],"decimation":[74],"method":[75,159],"so":[76],"that":[77,150],"the":[78,82,90,94,120,127,151],"with":[81,102],"has":[84],"minimum":[85],"nonlinearity":[86],"error.":[87],"evaluate":[89],"performance":[91],"improvement":[92],"using":[93],"architecture,":[97],"two":[98],"identical":[99],"channels":[101],"1-chain,":[103],"2-chain,":[104],"4-chain":[106],"merged":[107],"TDLs,":[108],"respectively,":[109],"were":[110,135],"implemented":[111],"Xilinx":[114],"Kintex-7":[115],"FPGA.":[116],"For":[117],"time-intervals":[118],"range":[121],"from":[122],"0":[123],"50":[125],"ns,":[126],"average":[128],"RMS":[129],"precisions":[130],"pairs":[134],"measured":[136],"as":[137],"8.5":[138],"ps,":[139,141,144],"5.3":[140],"4.3":[143],"respectively.":[145],"test":[147],"results":[148],"confirm":[149],"proposed":[152],"an":[156],"FPGA-independent":[157],"effective":[158],"boosting":[161],"precision":[163],"without":[164],"significant":[165],"increase":[166],"hardware":[168],"complexity":[169],"logic":[171],"resource":[172],"consumption.":[173]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":11},{"year":2024,"cited_by_count":11},{"year":2023,"cited_by_count":7},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":8},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
