{"id":"https://openalex.org/W1512440898","doi":"https://doi.org/10.1109/tcsii.2015.2435691","title":"An Optimum Loop Gain Tracking All-Digital PLL Using Autocorrelation of Bang\u2013Bang Phase-Frequency Detection","display_name":"An Optimum Loop Gain Tracking All-Digital PLL Using Autocorrelation of Bang\u2013Bang Phase-Frequency Detection","publication_year":2015,"publication_date":"2015-05-20","ids":{"openalex":"https://openalex.org/W1512440898","doi":"https://doi.org/10.1109/tcsii.2015.2435691","mag":"1512440898"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2015.2435691","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2015.2435691","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111676574","display_name":"Sungchun Jang","orcid":null},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sungchun Jang","raw_affiliation_strings":["Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center (ISRC), Seoul National University, Seoul, Korea","Dept. of Electr. & Comput. Eng., Seoul Nat. Univ., Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center (ISRC), Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Seoul Nat. Univ., Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040605443","display_name":"Sungwoo Kim","orcid":"https://orcid.org/0000-0002-4189-7120"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sungwoo Kim","raw_affiliation_strings":["Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center (ISRC), Seoul National University, Seoul, Korea","Dept. of Electr. & Comput. Eng., Seoul Nat. Univ., Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center (ISRC), Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Seoul Nat. Univ., Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108376815","display_name":"Sang-Hyeok Chu","orcid":null},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sang-Hyeok Chu","raw_affiliation_strings":["Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center (ISRC), Seoul National University, Seoul, Korea","Dept. of Electr. & Comput. Eng., Seoul Nat. Univ., Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center (ISRC), Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Seoul Nat. Univ., Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102716079","display_name":"Gyu-Seob Jeong","orcid":"https://orcid.org/0000-0002-9432-0800"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Gyu-Seob Jeong","raw_affiliation_strings":["Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center (ISRC), Seoul National University, Seoul, Korea","Dept. of Electr. & Comput. Eng., Seoul Nat. Univ., Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center (ISRC), Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Seoul Nat. Univ., Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003608838","display_name":"Yoonsoo Kim","orcid":"https://orcid.org/0000-0002-0357-9826"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Yoonsoo Kim","raw_affiliation_strings":["Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center (ISRC), Seoul National University, Seoul, Korea","Dept. of Electr. & Comput. Eng., Seoul Nat. Univ., Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center (ISRC), Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Seoul Nat. Univ., Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008010401","display_name":"Deog\u2010Kyoon Jeong","orcid":"https://orcid.org/0000-0003-0436-703X"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Deog-Kyoon Jeong","raw_affiliation_strings":["Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center (ISRC), Seoul National University, Seoul, Korea","Dept. of Electr. & Comput. Eng., Seoul Nat. Univ., Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering and the Inter-University Semiconductor Research Center (ISRC), Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Seoul Nat. Univ., Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I139264467"],"apc_list":null,"apc_paid":null,"fwci":3.2128,"has_fulltext":false,"cited_by_count":48,"citation_normalized_percentile":{"value":0.92194555,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"62","issue":"9","first_page":"836","last_page":"840"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9918000102043152,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.8015958070755005},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.7622936367988586},{"id":"https://openalex.org/keywords/autocorrelation","display_name":"Autocorrelation","score":0.6993464231491089},{"id":"https://openalex.org/keywords/loop-gain","display_name":"Loop gain","score":0.6481186151504517},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.5606290102005005},{"id":"https://openalex.org/keywords/delay-locked-loop","display_name":"Delay-locked loop","score":0.5381041765213013},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.5078111290931702},{"id":"https://openalex.org/keywords/phase-detector","display_name":"Phase detector","score":0.4494393765926361},{"id":"https://openalex.org/keywords/pll-multibit","display_name":"PLL multibit","score":0.44025561213493347},{"id":"https://openalex.org/keywords/automatic-gain-control","display_name":"Automatic gain control","score":0.42644989490509033},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3917674422264099},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3011428415775299},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.2828060984611511},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21789705753326416},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.19739019870758057},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.1326693296432495},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.11305424571037292},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.0816173255443573}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.8015958070755005},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.7622936367988586},{"id":"https://openalex.org/C5297727","wikidata":"https://www.wikidata.org/wiki/Q786970","display_name":"Autocorrelation","level":2,"score":0.6993464231491089},{"id":"https://openalex.org/C199943209","wikidata":"https://www.wikidata.org/wiki/Q1271153","display_name":"Loop gain","level":3,"score":0.6481186151504517},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.5606290102005005},{"id":"https://openalex.org/C190462668","wikidata":"https://www.wikidata.org/wiki/Q492265","display_name":"Delay-locked loop","level":4,"score":0.5381041765213013},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.5078111290931702},{"id":"https://openalex.org/C110086884","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase detector","level":3,"score":0.4494393765926361},{"id":"https://openalex.org/C77881186","wikidata":"https://www.wikidata.org/wiki/Q7119642","display_name":"PLL multibit","level":4,"score":0.44025561213493347},{"id":"https://openalex.org/C177502760","wikidata":"https://www.wikidata.org/wiki/Q782524","display_name":"Automatic gain control","level":4,"score":0.42644989490509033},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3917674422264099},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3011428415775299},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.2828060984611511},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21789705753326416},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.19739019870758057},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.1326693296432495},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11305424571037292},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0816173255443573},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2015.2435691","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2015.2435691","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.7400000095367432,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320322202","display_name":"IC Design Education Center","ror":"https://ror.org/005v57z85"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W2030871918","https://openalex.org/W2036186630","https://openalex.org/W2089328455","https://openalex.org/W2102168960","https://openalex.org/W2108185796","https://openalex.org/W2111679634","https://openalex.org/W2112008043","https://openalex.org/W2127115683","https://openalex.org/W2136750748","https://openalex.org/W2154332266","https://openalex.org/W2180973527","https://openalex.org/W6658145082","https://openalex.org/W6676844732"],"related_works":["https://openalex.org/W2004266780","https://openalex.org/W2054877252","https://openalex.org/W786718093","https://openalex.org/W1990401855","https://openalex.org/W1929620319","https://openalex.org/W4385624389","https://openalex.org/W4243394226","https://openalex.org/W78833336","https://openalex.org/W4237742466","https://openalex.org/W2059375515"],"abstract_inverted_index":{"An":[0,43],"all-digital":[1],"phase-locked":[2],"loop":[3,14,45,59,68,81],"with":[4],"a":[5,100],"bang-bang":[6,31],"phase-frequency":[7],"detector":[8],"(BBPFD)":[9],"that":[10],"tracks":[11],"the":[12,24,30,35,39,50,53,58,63,74,80,86,89],"optimum":[13],"gain":[15,46,60],"for":[16],"minimum":[17],"jitter":[18,115],"is":[19],"proposed.":[20],"The":[21,66,93,104],"autocorrelation":[22,51,64],"of":[23,26,52,88,116],"output":[25,55],"BBPFD":[27,54],"indicates":[28],"whether":[29],"PLL":[32],"operates":[33,70],"in":[34,99],"nonlinear":[36],"regime":[37],"or":[38],"random":[40],"noise":[41],"regime.":[42],"adaptive":[44],"controller":[47],"continuously":[48],"evaluates":[49],"and":[56,83,112],"adjusts":[57],"to":[61,78,84],"make":[62],"zero.":[65],"digital":[67],"filter":[69],"at":[71,109],"higher":[72],"than":[73],"reference":[75],"clock":[76],"frequency":[77],"reduce":[79],"latency":[82],"mitigate":[85],"resolution":[87],"digitally":[90],"controlled":[91],"oscillator.":[92],"prototype":[94],"chip":[95],"has":[96],"been":[97],"fabricated":[98],"65-nm":[101],"CMOS":[102],"process.":[103],"core":[105],"consumes":[106],"5":[107],"mW":[108],"2.5":[110],"GHz":[111],"exhibits":[113],"root-mean-square":[114],"1.72":[117],"ps.":[118]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":6},{"year":2022,"cited_by_count":7},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":8},{"year":2018,"cited_by_count":7},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":1}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}