{"id":"https://openalex.org/W1855483721","doi":"https://doi.org/10.1109/tcsii.2014.2304893","title":"A Multiple-Stage Parallel Replica-Bitline Delay Addition Technique for Reducing Timing Variation of SRAM Sense Amplifiers","display_name":"A Multiple-Stage Parallel Replica-Bitline Delay Addition Technique for Reducing Timing Variation of SRAM Sense Amplifiers","publication_year":2014,"publication_date":"2014-02-21","ids":{"openalex":"https://openalex.org/W1855483721","doi":"https://doi.org/10.1109/tcsii.2014.2304893","mag":"1855483721"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2014.2304893","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2014.2304893","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5051112947","display_name":"Jianhui Wu","orcid":"https://orcid.org/0000-0002-7878-498X"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"JianHui Wu","raw_affiliation_strings":["National ASIC System Engineering Research Center, Southeast University, Nanjing, China","Nat. ASIC Syst. Eng. Res. Center, SouthEast Univ., Nanjing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Research Center, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]},{"raw_affiliation_string":"Nat. ASIC Syst. Eng. Res. Center, SouthEast Univ., Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085071786","display_name":"Jiafeng Zhu","orcid":"https://orcid.org/0000-0001-5778-625X"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"JiaFeng Zhu","raw_affiliation_strings":["National ASIC System Engineering Research Center, Southeast University, Nanjing, China","Nat. ASIC Syst. Eng. Res. Center, SouthEast Univ., Nanjing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National ASIC System Engineering Research Center, Southeast University, Nanjing, China","institution_ids":["https://openalex.org/I76569877"]},{"raw_affiliation_string":"Nat. ASIC Syst. Eng. Res. Center, SouthEast Univ., Nanjing, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083011646","display_name":"YingCheng Xia","orcid":null},"institutions":[{"id":"https://openalex.org/I143868143","display_name":"Anhui University","ror":"https://ror.org/05th6yx34","country_code":"CN","type":"education","lineage":["https://openalex.org/I143868143"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"YingCheng Xia","raw_affiliation_strings":["School of Electronics and Information Engineering, Anhui University, Hefei, China","Sch. of Electron & Inf. Eng., Anhui Univ., Hefei, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electronics and Information Engineering, Anhui University, Hefei, China","institution_ids":["https://openalex.org/I143868143"]},{"raw_affiliation_string":"Sch. of Electron & Inf. Eng., Anhui Univ., Hefei, China","institution_ids":["https://openalex.org/I143868143"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103561455","display_name":"Na Bai","orcid":"https://orcid.org/0000-0002-1633-2427"},"institutions":[{"id":"https://openalex.org/I143868143","display_name":"Anhui University","ror":"https://ror.org/05th6yx34","country_code":"CN","type":"education","lineage":["https://openalex.org/I143868143"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Na Bai","raw_affiliation_strings":["School of Electronics and Information Engineering, Anhui University, Hefei, China","Sch. of Electron & Inf. Eng., Anhui Univ., Hefei, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electronics and Information Engineering, Anhui University, Hefei, China","institution_ids":["https://openalex.org/I143868143"]},{"raw_affiliation_string":"Sch. of Electron & Inf. Eng., Anhui Univ., Hefei, China","institution_ids":["https://openalex.org/I143868143"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.7035,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.85634593,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"61","issue":"4","first_page":"264","last_page":"268"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8770111799240112},{"id":"https://openalex.org/keywords/replica","display_name":"Replica","score":0.8130376935005188},{"id":"https://openalex.org/keywords/sense","display_name":"Sense (electronics)","score":0.6523658037185669},{"id":"https://openalex.org/keywords/sense-amplifier","display_name":"Sense amplifier","score":0.5470404028892517},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.5447448492050171},{"id":"https://openalex.org/keywords/variation","display_name":"Variation (astronomy)","score":0.5262117385864258},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.39898306131362915},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3760989010334015},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2030775547027588},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.17889833450317383},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13180476427078247},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.11383640766143799},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.11357316374778748},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.0691666305065155}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8770111799240112},{"id":"https://openalex.org/C2775937380","wikidata":"https://www.wikidata.org/wiki/Q1232589","display_name":"Replica","level":2,"score":0.8130376935005188},{"id":"https://openalex.org/C143141573","wikidata":"https://www.wikidata.org/wiki/Q7450971","display_name":"Sense (electronics)","level":2,"score":0.6523658037185669},{"id":"https://openalex.org/C32666082","wikidata":"https://www.wikidata.org/wiki/Q7450979","display_name":"Sense amplifier","level":3,"score":0.5470404028892517},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.5447448492050171},{"id":"https://openalex.org/C2778334786","wikidata":"https://www.wikidata.org/wiki/Q1586270","display_name":"Variation (astronomy)","level":2,"score":0.5262117385864258},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.39898306131362915},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3760989010334015},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2030775547027588},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.17889833450317383},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13180476427078247},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.11383640766143799},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.11357316374778748},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.0691666305065155},{"id":"https://openalex.org/C44870925","wikidata":"https://www.wikidata.org/wiki/Q37547","display_name":"Astrophysics","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2014.2304893","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2014.2304893","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.7799999713897705,"display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G8408640263","display_name":null,"funder_award_id":"61176031","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1974982221","https://openalex.org/W1980970064","https://openalex.org/W2023227894","https://openalex.org/W2066274996","https://openalex.org/W2087010589","https://openalex.org/W2100483769","https://openalex.org/W2107909712","https://openalex.org/W2134560062","https://openalex.org/W2166287616","https://openalex.org/W2171894735"],"related_works":["https://openalex.org/W2615390028","https://openalex.org/W1993036096","https://openalex.org/W2566678046","https://openalex.org/W1980970064","https://openalex.org/W2047737410","https://openalex.org/W1855483721","https://openalex.org/W2052135822","https://openalex.org/W811768827","https://openalex.org/W2943630518","https://openalex.org/W1801034736"],"abstract_inverted_index":{"A":[0],"multiple-stage":[1],"parallel":[2],"replica-bitline":[3],"(RBL)":[4],"delay":[5,40],"addition":[6,53],"technique":[7,67,107,117],"for":[8,59],"reducing":[9],"the":[10,38,50,56,65,75,86,92,97,101,105,127,140],"timing":[11,52,58,71,103],"variation":[12],"of":[13,30,41,89,100,142],"static":[14],"random":[15],"access":[16,77,129],"memory":[17],"(SRAM)":[18],"sense":[19],"amplifiers":[20],"(SAs)":[21],"is":[22,44,108,131,145],"proposed.":[23],"Multiple-stage":[24],"RBLs":[25],"with":[26,62,104,113],"a":[27,81,114],"sufficient":[28],"count":[29],"replica":[31],"cells":[32],"are":[33],"utilized":[34],"in":[35,118],"parallel.":[36],"Subsequently,":[37],"RBL":[39,116],"each":[42],"stage":[43],"digitized":[45],"and":[46],"added":[47],"together":[48],"by":[49,133,147],"proposed":[51,66,106],"circuit":[54],"to":[55],"target":[57],"SAs.":[60],"Compared":[61],"existing":[63],"techniques,":[64],"can":[68],"achieve":[69],"lower":[70],"variation,":[72],"which":[73],"reduces":[74],"SRAM":[76,128,144],"time,":[78],"particularly":[79],"at":[80,135],"low":[82],"supply":[83,87,137],"voltage.":[84],"At":[85],"voltage":[88],"0.8":[90],"V,":[91],"simulation":[93],"results":[94],"show":[95],"that":[96,112],"standard":[98],"deviation":[99],"SA-enable":[102],"80%":[109],"smaller":[110],"than":[111],"conventional":[115],"Taiwan":[119],"Semiconductor":[120],"Manufacturing":[121],"Company":[122],"65-nm":[123],"CMOS":[124],"technology.":[125],"Therefore,":[126],"time":[130],"reduced":[132],"21%":[134],"0.8-V":[136],"voltage,":[138],"whereas":[139],"area":[141],"16-kb":[143],"increased":[146],"3.5%.":[148]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":4}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}