{"id":"https://openalex.org/W2070950872","doi":"https://doi.org/10.1109/tcsii.2011.2172716","title":"Low-Power 10-Gb/s Transmitter for High-Speed Graphic DRAMs Using 0.18- $\\mu\\hbox{m}$ CMOS Technology","display_name":"Low-Power 10-Gb/s Transmitter for High-Speed Graphic DRAMs Using 0.18- $\\mu\\hbox{m}$ CMOS Technology","publication_year":2011,"publication_date":"2011-12-01","ids":{"openalex":"https://openalex.org/W2070950872","doi":"https://doi.org/10.1109/tcsii.2011.2172716","mag":"2070950872"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2011.2172716","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2011.2172716","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100606033","display_name":"Jun-Yong Song","orcid":"https://orcid.org/0000-0002-6056-5981"},"institutions":[{"id":"https://openalex.org/I4575257","display_name":"Hanyang University","ror":"https://ror.org/046865y68","country_code":"KR","type":"education","lineage":["https://openalex.org/I4575257"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jun-Yong Song","raw_affiliation_strings":["Department of Electronics and Computer Engineering, Hanyang University, Seoul, South Korea","[Dept. of Electron. & Comput. Eng., Hanyang Univ., Seoul, South Korea]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Computer Engineering, Hanyang University, Seoul, South Korea","institution_ids":["https://openalex.org/I4575257"]},{"raw_affiliation_string":"[Dept. of Electron. & Comput. Eng., Hanyang Univ., Seoul, South Korea]","institution_ids":["https://openalex.org/I4575257"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5034769470","display_name":"Oh\u2010Kyong Kwon","orcid":"https://orcid.org/0000-0003-0088-5198"},"institutions":[{"id":"https://openalex.org/I4575257","display_name":"Hanyang University","ror":"https://ror.org/046865y68","country_code":"KR","type":"education","lineage":["https://openalex.org/I4575257"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Oh-Kyong Kwon","raw_affiliation_strings":["Department of Electronics and Computer Engineering, Hanyang University, Seoul, South Korea","[Dept. of Electron. & Comput. Eng., Hanyang Univ., Seoul, South Korea]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Computer Engineering, Hanyang University, Seoul, South Korea","institution_ids":["https://openalex.org/I4575257"]},{"raw_affiliation_string":"[Dept. of Electron. & Comput. Eng., Hanyang Univ., Seoul, South Korea]","institution_ids":["https://openalex.org/I4575257"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4575257"],"apc_list":null,"apc_paid":null,"fwci":0.5325,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.70669923,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"58","issue":"12","first_page":"921","last_page":"925"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9937999844551086,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.993399977684021,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.9219751954078674},{"id":"https://openalex.org/keywords/transmitter","display_name":"Transmitter","score":0.7991471886634827},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.7709969282150269},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7514750957489014},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.6042062044143677},{"id":"https://openalex.org/keywords/serdes","display_name":"SerDes","score":0.47585174441337585},{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.45537930727005005},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4332963824272156},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3897971510887146},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.33544737100601196},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3329859972000122},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.23281893134117126},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.20994919538497925},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.176253080368042},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.1019117534160614}],"concepts":[{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.9219751954078674},{"id":"https://openalex.org/C47798520","wikidata":"https://www.wikidata.org/wiki/Q190157","display_name":"Transmitter","level":3,"score":0.7991471886634827},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.7709969282150269},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7514750957489014},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.6042062044143677},{"id":"https://openalex.org/C19707634","wikidata":"https://www.wikidata.org/wiki/Q6510662","display_name":"SerDes","level":2,"score":0.47585174441337585},{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.45537930727005005},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4332963824272156},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3897971510887146},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.33544737100601196},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3329859972000122},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.23281893134117126},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.20994919538497925},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.176253080368042},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.1019117534160614}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2011.2172716","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2011.2172716","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8899999856948853,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1544623790","https://openalex.org/W1963587303","https://openalex.org/W1982610482","https://openalex.org/W2114953806","https://openalex.org/W2115623896","https://openalex.org/W2147390479","https://openalex.org/W2164188348","https://openalex.org/W2166984288","https://openalex.org/W2179481090","https://openalex.org/W2788595513"],"related_works":["https://openalex.org/W2392047957","https://openalex.org/W1985059941","https://openalex.org/W2039899645","https://openalex.org/W2371342700","https://openalex.org/W2327110311","https://openalex.org/W2363059241","https://openalex.org/W3215187042","https://openalex.org/W266342242","https://openalex.org/W2100439961","https://openalex.org/W1912564497"],"abstract_inverted_index":{"This":[0],"brief":[1],"presents":[2],"a":[3,7,16,22,67,91],"10-Gb/s":[4],"transmitter":[5,89],"using":[6,66,90],"low-power":[8],"one-stage":[9],"8:1":[10],"multiplexer.":[11,51,84],"In":[12],"the":[13,33,41,47,50,75,79,83,88,97,104],"proposed":[14,53],"transmitter,":[15],"differential":[17],"current-steering":[18,37],"output":[19,38,43],"driver":[20,39,81],"with":[21,70],"multiphase":[23],"multiplexer":[24,54],"architecture":[25],"is":[26],"used":[27],"to":[28],"alleviate":[29],"speed":[30],"limitations":[31],"of":[32,49,78,87,100,107],"DRAM":[34],"process.":[35],"The":[36,52,85],"reduces":[40],"required":[42],"swing":[44],"and":[45,73],"increases":[46],"bandwidth":[48],"accomplishes":[55],"not":[56],"only":[57],"high-speed":[58],"operation":[59],"but":[60],"also":[61],"low":[62],"power":[63,98],"dissipation":[64],"by":[65],"pseudo-nMOS":[68],"configuration":[69],"one-stacked":[71],"switches":[72],"reducing":[74],"short-circuit":[76],"current":[77],"gate":[80],"in":[82],"prototype":[86],"0.18-":[92],"\u03bcm":[93],"CMOS":[94],"technology":[95],"achieves":[96],"efficiency":[99],"5.69":[101],"mW/Gb/s":[102],"at":[103],"data":[105],"rate":[106],"10":[108],"Gb/s.":[109]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
