{"id":"https://openalex.org/W2151466808","doi":"https://doi.org/10.1109/tcsii.2010.2043462","title":"Design Hardening of Nanometer SRAMs Through Transistor Width Modulation and Multi-Vt Combination","display_name":"Design Hardening of Nanometer SRAMs Through Transistor Width Modulation and Multi-Vt Combination","publication_year":2010,"publication_date":"2010-04-01","ids":{"openalex":"https://openalex.org/W2151466808","doi":"https://doi.org/10.1109/tcsii.2010.2043462","mag":"2151466808"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2010.2043462","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2010.2043462","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5021213940","display_name":"Gabriel Torrens","orcid":"https://orcid.org/0000-0002-3676-9992"},"institutions":[{"id":"https://openalex.org/I50441567","display_name":"Universitat de les Illes Balears","ror":"https://ror.org/03e10x626","country_code":"ES","type":"education","lineage":["https://openalex.org/I50441567"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"G. Torrens","raw_affiliation_strings":["Electronic Systems Group GSE, Balearic Islands University, Palma de Mallorca, Spain"],"affiliations":[{"raw_affiliation_string":"Electronic Systems Group GSE, Balearic Islands University, Palma de Mallorca, Spain","institution_ids":["https://openalex.org/I50441567"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027850952","display_name":"B. Alorda","orcid":"https://orcid.org/0000-0002-5617-6254"},"institutions":[{"id":"https://openalex.org/I50441567","display_name":"Universitat de les Illes Balears","ror":"https://ror.org/03e10x626","country_code":"ES","type":"education","lineage":["https://openalex.org/I50441567"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"B. Alorda","raw_affiliation_strings":["Electronic Systems Group GSE, Balearic Islands University, Palma de Mallorca, Spain"],"affiliations":[{"raw_affiliation_string":"Electronic Systems Group GSE, Balearic Islands University, Palma de Mallorca, Spain","institution_ids":["https://openalex.org/I50441567"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012493714","display_name":"Salvador Barcel\u00f3","orcid":"https://orcid.org/0000-0003-4425-0186"},"institutions":[{"id":"https://openalex.org/I50441567","display_name":"Universitat de les Illes Balears","ror":"https://ror.org/03e10x626","country_code":"ES","type":"education","lineage":["https://openalex.org/I50441567"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"S. Barcel\u00f3","raw_affiliation_strings":["Electronic Systems Group GSE, Balearic Islands University, Palma de Mallorca, Spain"],"affiliations":[{"raw_affiliation_string":"Electronic Systems Group GSE, Balearic Islands University, Palma de Mallorca, Spain","institution_ids":["https://openalex.org/I50441567"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085233948","display_name":"Josep L. Rossell\u00f3","orcid":"https://orcid.org/0000-0001-5390-2276"},"institutions":[{"id":"https://openalex.org/I50441567","display_name":"Universitat de les Illes Balears","ror":"https://ror.org/03e10x626","country_code":"ES","type":"education","lineage":["https://openalex.org/I50441567"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"J. L. Rossell\u00f3","raw_affiliation_strings":["Electronic Systems Group GSE, Balearic Islands University, Palma de Mallorca, Spain"],"affiliations":[{"raw_affiliation_string":"Electronic Systems Group GSE, Balearic Islands University, Palma de Mallorca, Spain","institution_ids":["https://openalex.org/I50441567"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028591446","display_name":"S.A. Bota","orcid":"https://orcid.org/0000-0002-7653-0740"},"institutions":[{"id":"https://openalex.org/I50441567","display_name":"Universitat de les Illes Balears","ror":"https://ror.org/03e10x626","country_code":"ES","type":"education","lineage":["https://openalex.org/I50441567"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"S. A. Bota","raw_affiliation_strings":["Electronic Systems Group GSE, Balearic Islands University, Palma de Mallorca, Spain"],"affiliations":[{"raw_affiliation_string":"Electronic Systems Group GSE, Balearic Islands University, Palma de Mallorca, Spain","institution_ids":["https://openalex.org/I50441567"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077705720","display_name":"J. Segura","orcid":"https://orcid.org/0000-0001-9742-2936"},"institutions":[{"id":"https://openalex.org/I50441567","display_name":"Universitat de les Illes Balears","ror":"https://ror.org/03e10x626","country_code":"ES","type":"education","lineage":["https://openalex.org/I50441567"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"J. Segura","raw_affiliation_strings":["Electronic Systems Group GSE, Balearic Islands University, Palma de Mallorca, Spain"],"affiliations":[{"raw_affiliation_string":"Electronic Systems Group GSE, Balearic Islands University, Palma de Mallorca, Spain","institution_ids":["https://openalex.org/I50441567"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5021213940"],"corresponding_institution_ids":["https://openalex.org/I50441567"],"apc_list":null,"apc_paid":null,"fwci":2.8864,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":{"value":0.91482862,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"57","issue":"4","first_page":"280","last_page":"284"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/noise-immunity","display_name":"Noise immunity","score":0.6793060302734375},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6336020231246948},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.5411900281906128},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.5297620892524719},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5056564807891846},{"id":"https://openalex.org/keywords/noise-margin","display_name":"Noise margin","score":0.49316877126693726},{"id":"https://openalex.org/keywords/modulation","display_name":"Modulation (music)","score":0.4895668923854828},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4670385718345642},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4658551812171936},{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.4624825417995453},{"id":"https://openalex.org/keywords/margin","display_name":"Margin (machine learning)","score":0.4353029429912567},{"id":"https://openalex.org/keywords/design-for-manufacturability","display_name":"Design for manufacturability","score":0.41840124130249023},{"id":"https://openalex.org/keywords/nanometre","display_name":"Nanometre","score":0.4145733714103699},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.37590086460113525},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3187377452850342},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2784966826438904},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22595006227493286},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1902293562889099},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1630415916442871},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.16186600923538208},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.15454789996147156}],"concepts":[{"id":"https://openalex.org/C2988494973","wikidata":"https://www.wikidata.org/wiki/Q179448","display_name":"Noise immunity","level":3,"score":0.6793060302734375},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6336020231246948},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.5411900281906128},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.5297620892524719},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5056564807891846},{"id":"https://openalex.org/C179499742","wikidata":"https://www.wikidata.org/wiki/Q1324892","display_name":"Noise margin","level":4,"score":0.49316877126693726},{"id":"https://openalex.org/C123079801","wikidata":"https://www.wikidata.org/wiki/Q750240","display_name":"Modulation (music)","level":2,"score":0.4895668923854828},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4670385718345642},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4658551812171936},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.4624825417995453},{"id":"https://openalex.org/C774472","wikidata":"https://www.wikidata.org/wiki/Q6760393","display_name":"Margin (machine learning)","level":2,"score":0.4353029429912567},{"id":"https://openalex.org/C62064638","wikidata":"https://www.wikidata.org/wiki/Q553878","display_name":"Design for manufacturability","level":2,"score":0.41840124130249023},{"id":"https://openalex.org/C77066764","wikidata":"https://www.wikidata.org/wiki/Q178674","display_name":"Nanometre","level":2,"score":0.4145733714103699},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.37590086460113525},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3187377452850342},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2784966826438904},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22595006227493286},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1902293562889099},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1630415916442871},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.16186600923538208},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.15454789996147156},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C42360764","wikidata":"https://www.wikidata.org/wiki/Q83588","display_name":"Chemical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C24890656","wikidata":"https://www.wikidata.org/wiki/Q82811","display_name":"Acoustics","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2010.2043462","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2010.2043462","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W270615609","https://openalex.org/W1972032415","https://openalex.org/W2050431855","https://openalex.org/W2096947463","https://openalex.org/W2100250713","https://openalex.org/W2101255991","https://openalex.org/W2111701388","https://openalex.org/W2123907815","https://openalex.org/W2126248298","https://openalex.org/W2126898248","https://openalex.org/W2134490163","https://openalex.org/W2136063334","https://openalex.org/W2136332872","https://openalex.org/W2143781639","https://openalex.org/W2158267481","https://openalex.org/W2160451204","https://openalex.org/W2168101540","https://openalex.org/W2168525368","https://openalex.org/W2170649610","https://openalex.org/W2171922263","https://openalex.org/W4256618650","https://openalex.org/W6838110893"],"related_works":["https://openalex.org/W1979360617","https://openalex.org/W2975406511","https://openalex.org/W2341392992","https://openalex.org/W2143750673","https://openalex.org/W2023781639","https://openalex.org/W2997716136","https://openalex.org/W2388589331","https://openalex.org/W2520621519","https://openalex.org/W2366713167","https://openalex.org/W2097103468"],"abstract_inverted_index":{"<para":[0],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[1],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[2],"Memory":[3],"design":[4,38,59,142],"in":[5,49],"the":[6,13,24,36,76,83,98,120,126],"nanometer":[7],"regime":[8],"imposes":[9],"specific":[10],"restrictions":[11,32],"to":[12,22,41,45,61,74,136],"cell":[14,43,63,68,127],"layout":[15,31],"structure":[16],"requiring":[17],"regular":[18,67],"disposition":[19],"of":[20,26,35,78,82,100,122,131],"transistors":[21],"minimize":[23],"impact":[25,124],"process":[27],"parameter":[28],"variations.":[29],"These":[30],"invalidate":[33],"many":[34],"traditional":[37],"techniques":[39,133],"oriented":[40],"improve":[42,62],"immunity":[44,95,117],"radiation-induced":[46],"events":[47],"that,":[48],"turn,":[50],"get":[51],"worsened":[52],"with":[53,66],"technology":[54],"scaling.":[55],"We":[56],"analyze":[57],"two":[58],"alternatives":[60],"hardening":[64],"compatible":[65],"layouts":[69],"providing":[70],"an":[71,94],"extensive":[72],"analysis":[73],"illustrate":[75],"benefits":[77],"each":[79],"technique.":[80],"One":[81],"proposed":[84],"solutions":[85],"is":[86,108,134],"based":[87,109],"on":[88,110,125,157],"transistor":[89],"width":[90],"modulation":[91],"that":[92],"provides":[93],"enhancement":[96],"at":[97,119],"cost":[99,121],"a":[101,115],"moderate":[102,116],"cell-size":[103],"increase.":[104],"The":[105,129],"other":[106,141],"solution":[107],"multithreshold":[111],"voltage":[112],"selection":[113],"showing":[114],"improvement":[118],"no":[123],"area.":[128],"combination":[130],"both":[132],"shown":[135],"be":[137],"optimum":[138],"when":[139],"considering":[140],"metrics":[143],"like":[144],"static":[145],"noise":[146],"margin,":[147],"read/write":[148],"stability,":[149],"access":[150],"time,":[151],"and":[152,159],"leakage.":[153],"Results":[154],"are":[155],"demonstrated":[156],"90-":[158],"65-nm":[160],"commercial":[161],"technologies.":[162],"</para>":[163]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":6},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}