{"id":"https://openalex.org/W2129975282","doi":"https://doi.org/10.1109/tcsii.2009.2030366","title":"Fast Algorithm and Low-Cost Hardware-Sharing Design of Multiple Integer Transforms for VC-1","display_name":"Fast Algorithm and Low-Cost Hardware-Sharing Design of Multiple Integer Transforms for VC-1","publication_year":2009,"publication_date":"2009-10-01","ids":{"openalex":"https://openalex.org/W2129975282","doi":"https://doi.org/10.1109/tcsii.2009.2030366","mag":"2129975282"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2009.2030366","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2009.2030366","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003025198","display_name":"Chih\u2010Peng Fan","orcid":"https://orcid.org/0000-0002-0585-975X"},"institutions":[{"id":"https://openalex.org/I162838928","display_name":"National Chung Hsing University","ror":"https://ror.org/05vn3ca78","country_code":"TW","type":"education","lineage":["https://openalex.org/I162838928"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Chih-Peng Fan","raw_affiliation_strings":["Department of Electrical Engineering, National Chung Hsing University, Taichung, Taiwan","Dept. of Electr. Eng., National Chung Hsing Univ., Taichung, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Chung Hsing University, Taichung, Taiwan","institution_ids":["https://openalex.org/I162838928"]},{"raw_affiliation_string":"Dept. of Electr. Eng., National Chung Hsing Univ., Taichung, Taiwan","institution_ids":["https://openalex.org/I162838928"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5086635221","display_name":"Guo-An Su","orcid":null},"institutions":[{"id":"https://openalex.org/I162838928","display_name":"National Chung Hsing University","ror":"https://ror.org/05vn3ca78","country_code":"TW","type":"education","lineage":["https://openalex.org/I162838928"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Guo-An Su","raw_affiliation_strings":["Department of Electrical Engineering, National Chung Hsing University, Taichung, Taiwan","Dept. of Electr. Eng., National Chung Hsing Univ., Taichung, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Chung Hsing University, Taichung, Taiwan","institution_ids":["https://openalex.org/I162838928"]},{"raw_affiliation_string":"Dept. of Electr. Eng., National Chung Hsing Univ., Taichung, Taiwan","institution_ids":["https://openalex.org/I162838928"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5003025198"],"corresponding_institution_ids":["https://openalex.org/I162838928"],"apc_list":null,"apc_paid":null,"fwci":3.1722,"has_fulltext":false,"cited_by_count":21,"citation_normalized_percentile":{"value":0.91997023,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"56","issue":"10","first_page":"788","last_page":"792"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/integer","display_name":"Integer (computer science)","score":0.7445189952850342},{"id":"https://openalex.org/keywords/codec","display_name":"Codec","score":0.6628823280334473},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6108006238937378},{"id":"https://openalex.org/keywords/integer-programming","display_name":"Integer programming","score":0.5297107696533203},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4959190785884857},{"id":"https://openalex.org/keywords/hardware-architecture","display_name":"Hardware architecture","score":0.45332494378089905},{"id":"https://openalex.org/keywords/column","display_name":"Column (typography)","score":0.4482361674308777},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.44706445932388306},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.43723607063293457},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4296114146709442},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.34275346994400024},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2312384843826294},{"id":"https://openalex.org/keywords/frame","display_name":"Frame (networking)","score":0.11872941255569458},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10788467526435852},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.07310613989830017}],"concepts":[{"id":"https://openalex.org/C97137487","wikidata":"https://www.wikidata.org/wiki/Q729138","display_name":"Integer (computer science)","level":2,"score":0.7445189952850342},{"id":"https://openalex.org/C161765866","wikidata":"https://www.wikidata.org/wiki/Q184748","display_name":"Codec","level":2,"score":0.6628823280334473},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6108006238937378},{"id":"https://openalex.org/C56086750","wikidata":"https://www.wikidata.org/wiki/Q6042592","display_name":"Integer programming","level":2,"score":0.5297107696533203},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4959190785884857},{"id":"https://openalex.org/C65232700","wikidata":"https://www.wikidata.org/wiki/Q5656403","display_name":"Hardware architecture","level":3,"score":0.45332494378089905},{"id":"https://openalex.org/C2780551164","wikidata":"https://www.wikidata.org/wiki/Q2306599","display_name":"Column (typography)","level":3,"score":0.4482361674308777},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.44706445932388306},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.43723607063293457},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4296114146709442},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.34275346994400024},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2312384843826294},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.11872941255569458},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10788467526435852},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.07310613989830017},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2009.2030366","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2009.2030366","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.47999998927116394}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1982589375","https://openalex.org/W2010234189","https://openalex.org/W2012775432","https://openalex.org/W2054501530","https://openalex.org/W2095675790","https://openalex.org/W2101850393","https://openalex.org/W2138883417","https://openalex.org/W2141468353","https://openalex.org/W2215950092","https://openalex.org/W6653418552"],"related_works":["https://openalex.org/W2107680156","https://openalex.org/W2163719598","https://openalex.org/W3161919736","https://openalex.org/W2387018512","https://openalex.org/W4301184752","https://openalex.org/W1925942709","https://openalex.org/W2047683846","https://openalex.org/W2044902158","https://openalex.org/W2109912052","https://openalex.org/W1711527768"],"abstract_inverted_index":{"In":[0],"this":[1],"brief,":[2],"the":[3,25,40,48,62,69,72,78,82],"fast":[4,27,50],"1D":[5,28,51],"multiple":[6],"integer":[7,29,54],"transforms":[8,30],"of":[9,47,61,81],"Windows":[10],"Media":[11],"Video":[12],"9":[13],"(WMV-9/VC-1)":[14],"are":[15,31,57],"proposed":[16,26,49,73],"by":[17],"matrix":[18],"decompositions,":[19],"additions,":[20],"and":[21,34,52],"row/column":[22],"permutations.":[23],"Then,":[24],"hardware":[32,45,70],"shared,":[33],"they":[35],"can":[36],"be":[37],"applied":[38],"to":[39],"2D":[41,53],"transform":[42,55],"scheme.":[43],"The":[44],"costs":[46],"designs":[56,65],"smaller":[58],"than":[59],"those":[60],"previous":[63],"individual":[64],"without":[66],"shares.":[67],"With":[68],"share,":[71],"architecture":[74],"is":[75],"suitable":[76],"for":[77],"low-cost":[79],"implementation":[80],"VC-1":[83],"codec.":[84]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}