{"id":"https://openalex.org/W2202197943","doi":"https://doi.org/10.1109/tcsii.2009.2015352","title":"Corrections to \u201cVLSI Design of Diminished-One Modulo $2^{n} + 1$ Adder Using Circular Carry Selection\u201d [Sep 08 897-901]","display_name":"Corrections to \u201cVLSI Design of Diminished-One Modulo $2^{n} + 1$ Adder Using Circular Carry Selection\u201d [Sep 08 897-901]","publication_year":2009,"publication_date":"2009-03-01","ids":{"openalex":"https://openalex.org/W2202197943","doi":"https://doi.org/10.1109/tcsii.2009.2015352","mag":"2202197943"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2009.2015352","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2009.2015352","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"erratum","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111464853","display_name":"Tso\u2010Bing Juang","orcid":null},"institutions":[{"id":"https://openalex.org/I1309796872","display_name":"National Pingtung University","ror":"https://ror.org/03z698x91","country_code":"TW","type":"education","lineage":["https://openalex.org/I1309796872"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tso-Bing Juang","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National Pingtung Institute of Commerce, Ping Tung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Pingtung Institute of Commerce, Ping Tung, Taiwan","institution_ids":["https://openalex.org/I1309796872"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111671804","display_name":"Ming-Yu Tsai","orcid":null},"institutions":[{"id":"https://openalex.org/I142974352","display_name":"National Sun Yat-sen University","ror":"https://ror.org/00mjawt10","country_code":"TW","type":"education","lineage":["https://openalex.org/I142974352"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ming-Yu Tsai","raw_affiliation_strings":["Department of Computer Science and Engineering, National Sun Yat-Sen University, Kaohsiung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, National Sun Yat-Sen University, Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I142974352"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008514971","display_name":"Chin-Chieh Chiu","orcid":null},"institutions":[{"id":"https://openalex.org/I1309796872","display_name":"National Pingtung University","ror":"https://ror.org/03z698x91","country_code":"TW","type":"education","lineage":["https://openalex.org/I1309796872"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chin-Chieh Chiu","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National Pingtung Institute of Commerce, Ping Tung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Pingtung Institute of Commerce, Ping Tung, Taiwan","institution_ids":["https://openalex.org/I1309796872"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"56","issue":"3","first_page":"260","last_page":"261"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.9678914546966553},{"id":"https://openalex.org/keywords/modulo","display_name":"Modulo","score":0.9135191440582275},{"id":"https://openalex.org/keywords/carry","display_name":"Carry (investment)","score":0.7352129817008972},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.645777702331543},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.5810793042182922},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5724424719810486},{"id":"https://openalex.org/keywords/carry-save-adder","display_name":"Carry-save adder","score":0.4992086887359619},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.43002229928970337},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3823227286338806},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.36525899171829224},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3302435576915741},{"id":"https://openalex.org/keywords/discrete-mathematics","display_name":"Discrete mathematics","score":0.3009427785873413},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.12052702903747559},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10818734765052795},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.08691692352294922}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.9678914546966553},{"id":"https://openalex.org/C54732982","wikidata":"https://www.wikidata.org/wiki/Q1415345","display_name":"Modulo","level":2,"score":0.9135191440582275},{"id":"https://openalex.org/C2776299755","wikidata":"https://www.wikidata.org/wiki/Q432449","display_name":"Carry (investment)","level":2,"score":0.7352129817008972},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.645777702331543},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.5810793042182922},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5724424719810486},{"id":"https://openalex.org/C3227080","wikidata":"https://www.wikidata.org/wiki/Q5046770","display_name":"Carry-save adder","level":4,"score":0.4992086887359619},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.43002229928970337},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3823227286338806},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.36525899171829224},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3302435576915741},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.3009427785873413},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.12052702903747559},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10818734765052795},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.08691692352294922},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C10138342","wikidata":"https://www.wikidata.org/wiki/Q43015","display_name":"Finance","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsii.2009.2015352","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2009.2015352","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W2144141243"],"related_works":["https://openalex.org/W2127980940","https://openalex.org/W2605666407","https://openalex.org/W2157955791","https://openalex.org/W1584617340","https://openalex.org/W2064215635","https://openalex.org/W2532181444","https://openalex.org/W986131379","https://openalex.org/W2950842282","https://openalex.org/W2183905145","https://openalex.org/W2075110663"],"abstract_inverted_index":{"In":[0],"a":[1,12,40,46,51],"recent":[2],"paper":[3,37],"by":[4,136],"Lin":[5,137],"and":[6,50,59,138,155],"Sheu,":[7],"the":[8,20,35,78,84,87,100,104,109,113,125,130,133,149],"authors":[9],"have":[10,148],"proposed":[11,31,111,135],"new":[13],"circular-carry-selection":[14],"technique":[15],"that":[16],"is":[17,90,128],"applied":[18],"in":[19,34,69,112],"design":[21],"of":[22,39,80,86,103,124,152],"an":[23],"efficient":[24],"diminished-one":[25],"modulo":[26,32,66,81,120],"2n+":[27],"1":[28],"adder.":[29],"The":[30,122],"adder":[33,89,106],"aforementioned":[36,114],"consists":[38],"dual-sum":[41],"carry":[42,48],"look-ahead":[43],"(DS-CLA)":[44],"adder,":[45],"circular":[47],"generator,":[49],"multiplexer,":[52],"which":[53,116,145],"can":[54,117,146],"reduce":[55],"both":[56,153],"area-time":[57],"(AT)":[58],"time-power":[60],"(TP)":[61],"products":[62],"compared":[63],"with":[64,141],"previous":[65],"adders.":[67],"However,":[68],"our":[70],"investigation,":[71],"there":[72],"will":[73],"be":[74],"incorrect":[75],"results":[76],"on":[77,108],"calculation":[79],"addition":[82],"because":[83],"carry-in":[85],"DS-CLA":[88,105],"equal":[91],"to":[92],"zero.":[93],"To":[94],"remedy":[95],"this":[96],"drawback,":[97],"we":[98],"propose":[99],"corrected":[101,126],"architecture":[102,127],"based":[107],"equations":[110],"paper,":[115],"perform":[118],"correct":[119],"addition.":[121],"complexity":[123],"almost":[129],"same":[131,150],"as":[132],"one":[134],"Sheu":[139],"but":[140],"less":[142],"area":[143],"cost,":[144],"also":[147],"merits":[151],"AT":[154],"TP":[156],"products.":[157]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}