{"id":"https://openalex.org/W3143290943","doi":"https://doi.org/10.1109/tcsii.2008.2010157","title":"A Generalization of a Fast RNS Conversion for a New 4-Modulus Base","display_name":"A Generalization of a Fast RNS Conversion for a New 4-Modulus Base","publication_year":2009,"publication_date":"2009-01-01","ids":{"openalex":"https://openalex.org/W3143290943","doi":"https://doi.org/10.1109/tcsii.2008.2010157","mag":"3143290943"},"language":"en","primary_location":{"id":"doi:10.1109/tcsii.2008.2010157","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2008.2010157","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5033449032","display_name":"Laurent-St\u00c9phane Didier","orcid":null},"institutions":[{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]},{"id":"https://openalex.org/I4210159731","display_name":"LIP6","ror":"https://ror.org/05krcen59","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I39804081","https://openalex.org/I4210159245","https://openalex.org/I4210159731"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Laurent-St\u00c9phane Didier","raw_affiliation_strings":["Laboratoire d Informatique de Paris 6, Universit\u00e9 Pierre et Marie Curie, Paris, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratoire d Informatique de Paris 6, Universit\u00e9 Pierre et Marie Curie, Paris, France","institution_ids":["https://openalex.org/I39804081","https://openalex.org/I4210159731"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5045460282","display_name":"Pierre-Yves Rivaille","orcid":null},"institutions":[{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]},{"id":"https://openalex.org/I4210159731","display_name":"LIP6","ror":"https://ror.org/05krcen59","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I39804081","https://openalex.org/I4210159245","https://openalex.org/I4210159731"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Pierre-Yves Rivaille","raw_affiliation_strings":["Laboratoire d Informatique de Paris 6, Universit\u00e9 Pierre et Marie Curie, Paris, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratoire d Informatique de Paris 6, Universit\u00e9 Pierre et Marie Curie, Paris, France","institution_ids":["https://openalex.org/I39804081","https://openalex.org/I4210159731"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":9.257,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.97840363,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"56","issue":"1","first_page":"46","last_page":"50"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9962000250816345,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/residue-number-system","display_name":"Residue number system","score":0.7506762742996216},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.6401267647743225},{"id":"https://openalex.org/keywords/generalization","display_name":"Generalization","score":0.617098331451416},{"id":"https://openalex.org/keywords/moduli","display_name":"Moduli","score":0.5745556354522705},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5507676005363464},{"id":"https://openalex.org/keywords/base","display_name":"Base (topology)","score":0.5365512371063232},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5028786063194275},{"id":"https://openalex.org/keywords/modulus","display_name":"Modulus","score":0.4766448438167572},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4318878948688507},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.42761799693107605},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.4262257218360901},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.367838054895401},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3608274757862091},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2959167957305908},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.29399800300598145},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.19707417488098145},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.06982079148292542}],"concepts":[{"id":"https://openalex.org/C71480937","wikidata":"https://www.wikidata.org/wiki/Q3086516","display_name":"Residue number system","level":2,"score":0.7506762742996216},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.6401267647743225},{"id":"https://openalex.org/C177148314","wikidata":"https://www.wikidata.org/wiki/Q170084","display_name":"Generalization","level":2,"score":0.617098331451416},{"id":"https://openalex.org/C121089165","wikidata":"https://www.wikidata.org/wiki/Q6889796","display_name":"Moduli","level":2,"score":0.5745556354522705},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5507676005363464},{"id":"https://openalex.org/C42058472","wikidata":"https://www.wikidata.org/wiki/Q810214","display_name":"Base (topology)","level":2,"score":0.5365512371063232},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5028786063194275},{"id":"https://openalex.org/C193867417","wikidata":"https://www.wikidata.org/wiki/Q6889814","display_name":"Modulus","level":2,"score":0.4766448438167572},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4318878948688507},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.42761799693107605},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4262257218360901},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.367838054895401},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3608274757862091},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2959167957305908},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.29399800300598145},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.19707417488098145},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.06982079148292542},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcsii.2008.2010157","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsii.2008.2010157","pdf_url":null,"source":{"id":"https://openalex.org/S93916849","display_name":"IEEE Transactions on Circuits & Systems II Express Briefs","issn_l":"1549-7747","issn":["1549-7747","1558-3791"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs","raw_type":"journal-article"},{"id":"pmh:oai:HAL:hal-01146481v1","is_oa":false,"landing_page_url":"https://hal.science/hal-01146481","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems II: Express Briefs, 2009, 56 (1), pp.46-50. ⟨10.1109/TCSII.2008.2010157⟩","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1483115357","https://openalex.org/W1597721379","https://openalex.org/W1879281873","https://openalex.org/W1907426290","https://openalex.org/W1977235124","https://openalex.org/W1987464474","https://openalex.org/W2049238057","https://openalex.org/W2107355598","https://openalex.org/W2149043711","https://openalex.org/W2155095649","https://openalex.org/W2545238695","https://openalex.org/W2561934809","https://openalex.org/W4249098410","https://openalex.org/W6729094849"],"related_works":["https://openalex.org/W2542168764","https://openalex.org/W2076304632","https://openalex.org/W1852876249","https://openalex.org/W2146856939","https://openalex.org/W2169683161","https://openalex.org/W2580343161","https://openalex.org/W2101550730","https://openalex.org/W2154084782","https://openalex.org/W2522033187","https://openalex.org/W2148432541"],"abstract_inverted_index":{"A":[0],"generalization":[1],"of":[2,38,47],"a":[3,26,53],"new":[4],"generic":[5],"4-modulus":[6],"base":[7],"for":[8,29],"residue":[9],"number":[10],"systems":[11],"(RNS)":[12],"is":[13],"presented":[14],"in":[15],"this":[16],"paper.":[17],"An":[18],"efficient":[19],"RNS":[20],"to":[21,43],"binary":[22],"conversion":[23,40],"algorithm":[24],"and":[25,58,65,70],"hierarchical":[27],"architecture":[28,41],"these":[30],"bases":[31],"are":[32,52,76],"also":[33,77],"described.":[34],"The":[35,67],"key":[36],"features":[37],"our":[39],"compared":[42],"previous":[44],"published":[45],"architectures":[46],"the":[48,61,71],"same":[49],"output":[50],"range":[51],"larger":[54],"moduli":[55],"set":[56],"selection":[57],"savings":[59],"on":[60],"critical":[62],"delay,":[63],"area":[64],"power.":[66],"FPGA":[68],"implementation":[69],"detailed":[72],"proof":[73],"supporting":[74],"it":[75],"discussed.":[78]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":7}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}