{"id":"https://openalex.org/W7138903059","doi":"https://doi.org/10.1109/tcsi.2026.3669396","title":"Optimized Lightweight Midori Cipher Architecture Featuring Side-Channel Resilient S-Boxes for Secure Edge Computing","display_name":"Optimized Lightweight Midori Cipher Architecture Featuring Side-Channel Resilient S-Boxes for Secure Edge Computing","publication_year":2026,"publication_date":"2026-03-18","ids":{"openalex":"https://openalex.org/W7138903059","doi":"https://doi.org/10.1109/tcsi.2026.3669396"},"language":null,"primary_location":{"id":"doi:10.1109/tcsi.2026.3669396","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2026.3669396","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Ruby Mishra","orcid":"https://orcid.org/0000-0002-7331-281X"},"institutions":[{"id":"https://openalex.org/I67357951","display_name":"KIIT University","ror":"https://ror.org/00k8zt527","country_code":"IN","type":"education","lineage":["https://openalex.org/I67357951"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Ruby Mishra","raw_affiliation_strings":["School of Electronics, Kalinga Institute of Industrial Technology, Bhubaneswar, Odisha, India"],"raw_orcid":"https://orcid.org/0000-0002-7331-281X","affiliations":[{"raw_affiliation_string":"School of Electronics, Kalinga Institute of Industrial Technology, Bhubaneswar, Odisha, India","institution_ids":["https://openalex.org/I67357951"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008456972","display_name":"Manish Okade","orcid":"https://orcid.org/0000-0003-1500-2693"},"institutions":[{"id":"https://openalex.org/I16292982","display_name":"National Institute of Technology Rourkela","ror":"https://ror.org/011gmn932","country_code":"IN","type":"education","lineage":["https://openalex.org/I16292982"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Manish Okade","raw_affiliation_strings":["Department of Electronics and Communication Engineering, National Institute of Technology, Rourkela, Odisha, India"],"raw_orcid":"https://orcid.org/0000-0003-1500-2693","affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, National Institute of Technology, Rourkela, Odisha, India","institution_ids":["https://openalex.org/I16292982"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5073752818","display_name":"Kamalakanta Mahapatra","orcid":"https://orcid.org/0000-0003-4917-7088"},"institutions":[{"id":"https://openalex.org/I16292982","display_name":"National Institute of Technology Rourkela","ror":"https://ror.org/011gmn932","country_code":"IN","type":"education","lineage":["https://openalex.org/I16292982"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Kamalakanta Mahapatra","raw_affiliation_strings":["Department of Electronics and Communication Engineering, National Institute of Technology, Rourkela, Odisha, India"],"raw_orcid":"https://orcid.org/0000-0003-4917-7088","affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, National Institute of Technology, Rourkela, Odisha, India","institution_ids":["https://openalex.org/I16292982"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.36526088,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"73","issue":"6","first_page":"4178","last_page":"4191"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9923999905586243,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9923999905586243,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.002400000113993883,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.0013000000035390258,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.669700026512146},{"id":"https://openalex.org/keywords/block-cipher","display_name":"Block cipher","score":0.6689000129699707},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5378000140190125},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4896000027656555},{"id":"https://openalex.org/keywords/masking","display_name":"Masking (illustration)","score":0.4641000032424927},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.4593000113964081},{"id":"https://openalex.org/keywords/cipher","display_name":"Cipher","score":0.43149998784065247},{"id":"https://openalex.org/keywords/enhanced-data-rates-for-gsm-evolution","display_name":"Enhanced Data Rates for GSM Evolution","score":0.42410001158714294},{"id":"https://openalex.org/keywords/block-cipher-mode-of-operation","display_name":"Block cipher mode of operation","score":0.396699994802475}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7102000117301941},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.669700026512146},{"id":"https://openalex.org/C106544461","wikidata":"https://www.wikidata.org/wiki/Q543151","display_name":"Block cipher","level":3,"score":0.6689000129699707},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5687000155448914},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5378000140190125},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4896000027656555},{"id":"https://openalex.org/C2777402240","wikidata":"https://www.wikidata.org/wiki/Q6783436","display_name":"Masking (illustration)","level":2,"score":0.4641000032424927},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.4593000113964081},{"id":"https://openalex.org/C2780221543","wikidata":"https://www.wikidata.org/wiki/Q4681865","display_name":"Cipher","level":3,"score":0.43149998784065247},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.42410001158714294},{"id":"https://openalex.org/C60448319","wikidata":"https://www.wikidata.org/wiki/Q154021","display_name":"Block cipher mode of operation","level":2,"score":0.396699994802475},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.3950999975204468},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38119998574256897},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.37770000100135803},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3698999881744385},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3628000020980835},{"id":"https://openalex.org/C204241405","wikidata":"https://www.wikidata.org/wiki/Q461499","display_name":"Transformation (genetics)","level":3,"score":0.3336000144481659},{"id":"https://openalex.org/C71743495","wikidata":"https://www.wikidata.org/wiki/Q2845210","display_name":"Power analysis","level":3,"score":0.32760000228881836},{"id":"https://openalex.org/C94520183","wikidata":"https://www.wikidata.org/wiki/Q190746","display_name":"Advanced Encryption Standard","level":3,"score":0.32710000872612},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.32280001044273376},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.296999990940094},{"id":"https://openalex.org/C138236772","wikidata":"https://www.wikidata.org/wiki/Q25098575","display_name":"Edge device","level":3,"score":0.29589998722076416},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.2935999929904938},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2736000120639801},{"id":"https://openalex.org/C2778820799","wikidata":"https://www.wikidata.org/wiki/Q3454688","display_name":"Cost reduction","level":2,"score":0.26330000162124634},{"id":"https://openalex.org/C2778915421","wikidata":"https://www.wikidata.org/wiki/Q3643177","display_name":"Performance improvement","level":2,"score":0.25369998812675476},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.2524000108242035},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.2502000033855438}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2026.3669396","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2026.3669396","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8751870393753052,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"This":[0,121],"paper":[1],"presents":[2],"novel":[3],"hardware":[4],"architectures":[5],"for":[6,14,209,216,248,256],"Midori,":[7],"a":[8,33,40,73,81,113,171,178,257],"lightweight":[9],"symmetric":[10],"block":[11],"cipher":[12],"optimized":[13],"low-energy":[15],"edge":[16],"computing":[17],"applications.":[18,262],"To":[19],"enhance":[20],"the":[21,24,27,51,61,88,107,117,128,133,187,195,201,224,249,264,267,272],"efficiency":[22],"of":[23,53,90,116,150,154,159,266],"Midori-64":[25,130,210],"variant,":[26],"architecture":[28,62,208],"has":[29,84,277],"been":[30,85,278],"redesigned":[31],"with":[32,170,192,231],"16-bit":[34],"datapath.":[35],"The":[36,100,142,240],"proposed":[37,129,143,225,268],"design":[38],"adopts":[39],"hybrid":[41],"approach,":[42],"combining":[43],"parallel":[44],"and":[45,132,136,156,177,205,215,252,280],"serial":[46],"data":[47],"processing":[48],"to":[49,63,78,92,162,186,194,236,245,271],"meet":[50],"demands":[52],"encryption.":[54],"Specialized":[55],"selector":[56],"units":[57],"are":[58],"integrated":[59,105],"into":[60,87,106,127],"streamline":[64],"this":[65,285],"process,":[66],"resulting":[67],"in":[68,174,181,260,282,284],"improved":[69,229],"performance":[70,135,230],"while":[71],"maintaining":[72],"compact":[74],"footprint.":[75],"In":[76],"addition":[77],"architectural":[79],"enhancements,":[80],"masking":[82],"countermeasure":[83],"incorporated":[86],"S-boxes":[89,102,145,270],"Midori":[91],"strengthen":[93],"resistance":[94],"against":[95],"side-channel":[96],"power":[97,152,274],"analysis":[98,275],"attacks.":[99],"masked":[101,144,164,190,204,226,269],"were":[103,139],"initially":[104],"cipher\u2019s":[108],"substitution-permutation":[109],"network":[110],"(SPN),":[111],"forming":[112],"secure":[114],"variant":[115],"core":[118],"transformation":[119],"layer.":[120],"modified":[122],"SPN":[123],"was":[124],"subsequently":[125],"embedded":[126],"architecture,":[131],"associated":[134],"area":[137,148,175,251],"overheads":[138,176,183,234],"systematically":[140],"evaluated.":[141],"have":[146,243],"an":[147],"reduction":[149,153,158,173,180],"55.7%,":[151],"62.38%":[155],"energy":[157],"78.2%":[160],"compared":[161,185,235],"other":[163],"designs.":[165,197],"These":[166],"significant":[167],"improvements":[168],"come":[169],"50%":[172],"7%":[179],"delay":[182],"when":[184],"current":[188],"state-of-the-art":[189],"designs":[191,227],"respect":[193],"unmasked":[196,206,238],"We":[198],"also":[199],"evaluated":[200],"modified,":[202],"overall":[203],"encryption":[207],"on":[211],"Nexys4":[212],"DDR":[213],"FPGA":[214],"standard":[217],"cell":[218],"libraries.":[219],"Our":[220],"findings":[221],"indicate":[222],"that":[223],"offer":[228],"significantly":[232],"reduced":[233],"their":[237],"counterparts.":[239],"FPGA-based":[241],"implementations":[242],"proven":[244],"be":[246],"better":[247],"low":[250],"high":[253],"throughput":[254],"requirements":[255],"constrained":[258],"device":[259],"IoT":[261],"Moreover,":[263],"resiliency":[265],"differential":[273],"attack":[276],"explored":[279],"demonstrated":[281],"detail":[283],"paper.":[286]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2026-03-20T00:00:00"}
