{"id":"https://openalex.org/W7128614377","doi":"https://doi.org/10.1109/tcsi.2026.3661265","title":"A Low Area-Time ECPM Hardware Accelerator Over Curve25519 on FPGA","display_name":"A Low Area-Time ECPM Hardware Accelerator Over Curve25519 on FPGA","publication_year":2026,"publication_date":"2026-02-11","ids":{"openalex":"https://openalex.org/W7128614377","doi":"https://doi.org/10.1109/tcsi.2026.3661265"},"language":null,"primary_location":{"id":"doi:10.1109/tcsi.2026.3661265","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2026.3661265","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5089787527","display_name":"Yujun Xie","orcid":"https://orcid.org/0000-0002-7822-822X"},"institutions":[{"id":"https://openalex.org/I139024713","display_name":"Guangdong University of Technology","ror":"https://ror.org/04azbjn80","country_code":"CN","type":"education","lineage":["https://openalex.org/I139024713"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yujun Xie","raw_affiliation_strings":["School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China"],"raw_orcid":"https://orcid.org/0000-0002-7822-822X","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China","institution_ids":["https://openalex.org/I139024713"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5125653518","display_name":"Zhaoyang Ren","orcid":null},"institutions":[{"id":"https://openalex.org/I139024713","display_name":"Guangdong University of Technology","ror":"https://ror.org/04azbjn80","country_code":"CN","type":"education","lineage":["https://openalex.org/I139024713"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhaoyang Ren","raw_affiliation_strings":["School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China","institution_ids":["https://openalex.org/I139024713"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5125675390","display_name":"Jianlang Lu","orcid":null},"institutions":[{"id":"https://openalex.org/I139024713","display_name":"Guangdong University of Technology","ror":"https://ror.org/04azbjn80","country_code":"CN","type":"education","lineage":["https://openalex.org/I139024713"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jianlang Lu","raw_affiliation_strings":["School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China","institution_ids":["https://openalex.org/I139024713"]}]},{"author_position":"last","author":{"id":null,"display_name":"Yuan Liu","orcid":"https://orcid.org/0000-0002-7289-2103"},"institutions":[{"id":"https://openalex.org/I139024713","display_name":"Guangdong University of Technology","ror":"https://ror.org/04azbjn80","country_code":"CN","type":"education","lineage":["https://openalex.org/I139024713"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuan Liu","raw_affiliation_strings":["School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China"],"raw_orcid":"https://orcid.org/0000-0002-7289-2103","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China","institution_ids":["https://openalex.org/I139024713"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I139024713"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.11432286,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"73","issue":"5","first_page":"3494","last_page":"3507"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.9761999845504761,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.9761999845504761,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.008700000122189522,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.004900000058114529,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7271000146865845},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.6424000263214111},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.5789999961853027},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5442000031471252},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.5364999771118164},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.43479999899864197},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.43140000104904175},{"id":"https://openalex.org/keywords/iterative-method","display_name":"Iterative method","score":0.423799991607666}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7271000146865845},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.6424000263214111},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6395999789237976},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.5789999961853027},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5442000031471252},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.5364999771118164},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4456000030040741},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.43479999899864197},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.43140000104904175},{"id":"https://openalex.org/C159694833","wikidata":"https://www.wikidata.org/wiki/Q2321565","display_name":"Iterative method","level":2,"score":0.423799991607666},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.350600004196167},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.3463999927043915},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.3303999900817871},{"id":"https://openalex.org/C32049820","wikidata":"https://www.wikidata.org/wiki/Q319400","display_name":"Modular arithmetic","level":3,"score":0.2874000072479248},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2816999852657318},{"id":"https://openalex.org/C106516650","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm design","level":2,"score":0.2793999910354614},{"id":"https://openalex.org/C84211073","wikidata":"https://www.wikidata.org/wiki/Q117879","display_name":"Floating point","level":2,"score":0.27799999713897705},{"id":"https://openalex.org/C179603306","wikidata":"https://www.wikidata.org/wiki/Q268493","display_name":"Elliptic curve","level":2,"score":0.2687999904155731},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.26109999418258667},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.25699999928474426},{"id":"https://openalex.org/C163973906","wikidata":"https://www.wikidata.org/wiki/Q649900","display_name":"Fixed-point arithmetic","level":3,"score":0.2522999942302704},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.2515999972820282}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2026.3661265","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2026.3661265","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G1632894033","display_name":null,"funder_award_id":"62204062","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G2524628089","display_name":null,"funder_award_id":"2025B0101170004","funder_id":"https://openalex.org/F4320335777","funder_display_name":"National Key Research and Development Program of China"},{"id":"https://openalex.org/G7014899762","display_name":null,"funder_award_id":"62274044","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320335777","display_name":"National Key Research and Development Program of China","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":32,"referenced_works":["https://openalex.org/W60689211","https://openalex.org/W1498685334","https://openalex.org/W1910751411","https://openalex.org/W1971605365","https://openalex.org/W2003736153","https://openalex.org/W2004814164","https://openalex.org/W2018758602","https://openalex.org/W2096133993","https://openalex.org/W2151385722","https://openalex.org/W2154909745","https://openalex.org/W2286477783","https://openalex.org/W2507130841","https://openalex.org/W2544689054","https://openalex.org/W2731579764","https://openalex.org/W2893526099","https://openalex.org/W2943126371","https://openalex.org/W2947252660","https://openalex.org/W2968964112","https://openalex.org/W3047159940","https://openalex.org/W3118185480","https://openalex.org/W3202358406","https://openalex.org/W4232836212","https://openalex.org/W4245047333","https://openalex.org/W4281625693","https://openalex.org/W4297629219","https://openalex.org/W4317496706","https://openalex.org/W4384201201","https://openalex.org/W4387340714","https://openalex.org/W4388040902","https://openalex.org/W4396782831","https://openalex.org/W4400270590","https://openalex.org/W4402436849"],"related_works":[],"abstract_inverted_index":{"In":[0],"this":[1,57,170],"paper,":[2],"we":[3,18,94,102],"explore":[4,103],"a":[5,59,71,75,96,145],"low":[6],"area-time":[7],"elliptic":[8],"curve":[9],"point":[10],"multiplication":[11,37],"(ECPM)":[12],"hardware":[13,62,113],"accelerator":[14,122,136],"over":[15],"Curve25519.":[16],"Firstly,":[17],"analyze":[19],"the":[20,23,30,40,91,104,117,126,134,161,166,179],"correlation":[21],"of":[22,26,32,42,44,64,148,169],"data":[24],"hazards":[25],"LADDER":[27,77],"(main":[28],"operation),":[29],"number":[31,41],"pipeline":[33],"stages":[34],"in":[35,46],"modular":[36,65],"(MM),":[38],"and":[39,48,74,108,140,181,187],"iterations":[43],"multiplier":[45],"MM,":[47],"then":[49],"establish":[50],"an":[51,111],"equation":[52],"among":[53],"them.":[54],"Based":[55],"on":[56,90,125],"equation,":[58],"new":[60,76,97],"iterative":[61,99],"model":[63],"multiply-accumulator":[66],"(MMAC)":[67],"with":[68,144,160],"stage=10":[69],"using":[70],"128-bit":[72],"multiplier,":[73],"scheduling":[78],"are":[79],"proposed":[80,92,121,135],"to":[81,115,157,175,190],"support":[82],"high-performance":[83],"scenarios":[84],"for":[85],"Curve25519":[86,118,154],"ECPM.":[87,119],"Secondly,":[88],"based":[89],"method,":[93],"propose":[95],"255-bit":[98],"MMAC.":[100],"Finally,":[101],"trade-off":[105],"between":[106],"area":[107,180],"time,":[109],"present":[110],"efficient":[112],"design":[114,171],"accelerate":[116],"The":[120,130],"is":[123,172],"implemented":[124],"Xilinx":[127],"XC7Z020":[128],"platform.":[129],"results":[131],"show":[132],"that":[133],"costs":[137],"2,367":[138],"Slices":[139],"36":[141],"DSP":[142],"blocks,":[143],"clock":[146],"frequency":[147],"298":[149],"MHz.":[150],"When":[151],"calculating":[152],"one":[153],"ECPM,":[155],"compared":[156,189],"previous":[158],"designs":[159],"best":[162],"area*time":[163],"(AT)":[164],"value,":[165],"AT":[167],"value":[168],"220%":[173],"superior":[174],"their":[176],"design,":[177],"while":[178],"time":[182],"have":[183],"improved":[184],"by":[185],"52%":[186],"108%":[188],"theirs,":[191],"respectively.":[192]},"counts_by_year":[],"updated_date":"2026-05-05T06:06:40.768181","created_date":"2026-02-12T00:00:00"}