{"id":"https://openalex.org/W7123565403","doi":"https://doi.org/10.1109/tcsi.2025.3650194","title":"A 2.9-Gb/s Spread-Spectrum Clocking Transceiver Utilizing Phase Interpolation for EMI-Suppressed Chip-to-Chip Links","display_name":"A 2.9-Gb/s Spread-Spectrum Clocking Transceiver Utilizing Phase Interpolation for EMI-Suppressed Chip-to-Chip Links","publication_year":2026,"publication_date":"2026-01-13","ids":{"openalex":"https://openalex.org/W7123565403","doi":"https://doi.org/10.1109/tcsi.2025.3650194"},"language":null,"primary_location":{"id":"doi:10.1109/tcsi.2025.3650194","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3650194","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108220820","display_name":"Ching-Yuan Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I162838928","display_name":"National Chung Hsing University","ror":"https://ror.org/05vn3ca78","country_code":"TW","type":"education","lineage":["https://openalex.org/I162838928"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ching-Yuan Yang","raw_affiliation_strings":["Graduate Institute of Electrical Engineering and the Department of Electrical Engineering, National Chung Hsing University, Taichung City, Taiwan"],"raw_orcid":"https://orcid.org/0000-0002-5335-3665","affiliations":[{"raw_affiliation_string":"Graduate Institute of Electrical Engineering and the Department of Electrical Engineering, National Chung Hsing University, Taichung City, Taiwan","institution_ids":["https://openalex.org/I162838928"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078320657","display_name":"Shu\u2010Chi Wang","orcid":"https://orcid.org/0000-0001-9691-7507"},"institutions":[{"id":"https://openalex.org/I162838928","display_name":"National Chung Hsing University","ror":"https://ror.org/05vn3ca78","country_code":"TW","type":"education","lineage":["https://openalex.org/I162838928"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shu-Chi Wang","raw_affiliation_strings":["Department of Electrical Engineering, National Chung Hsing University, Taichung City, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Chung Hsing University, Taichung City, Taiwan","institution_ids":["https://openalex.org/I162838928"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019325152","display_name":"Wan-Yu Yu","orcid":null},"institutions":[{"id":"https://openalex.org/I162838928","display_name":"National Chung Hsing University","ror":"https://ror.org/05vn3ca78","country_code":"TW","type":"education","lineage":["https://openalex.org/I162838928"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Wan-Yu Yu","raw_affiliation_strings":["Department of Electrical Engineering, National Chung Hsing University, Taichung City, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Chung Hsing University, Taichung City, Taiwan","institution_ids":["https://openalex.org/I162838928"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5122923700","display_name":"Min-Shu Shih","orcid":null},"institutions":[{"id":"https://openalex.org/I162838928","display_name":"National Chung Hsing University","ror":"https://ror.org/05vn3ca78","country_code":"TW","type":"education","lineage":["https://openalex.org/I162838928"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Min-Shu Shih","raw_affiliation_strings":["Department of Electrical Engineering, National Chung Hsing University, Taichung City, Taiwan"],"raw_orcid":"https://orcid.org/0009-0003-4473-9229","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Chung Hsing University, Taichung City, Taiwan","institution_ids":["https://openalex.org/I162838928"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5051006109","display_name":"Pao Tai Lin","orcid":"https://orcid.org/0000-0002-5417-6920"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Pao Tai Lin","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Texas A&#x0026; M University, College Station, TX, USA"],"raw_orcid":"https://orcid.org/0000-0002-5417-6920","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Texas A&#x0026; M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.04618415,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"73","issue":"6","first_page":"3875","last_page":"3887"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9715999960899353,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9715999960899353,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.016599999740719795,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.0066999997943639755,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transceiver","display_name":"Transceiver","score":0.7763000130653381},{"id":"https://openalex.org/keywords/wireline","display_name":"Wireline","score":0.6276000142097473},{"id":"https://openalex.org/keywords/transmitter","display_name":"Transmitter","score":0.5881999731063843},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5271999835968018},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5267999768257141},{"id":"https://openalex.org/keywords/modulation","display_name":"Modulation (music)","score":0.49050000309944153},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.4837000072002411},{"id":"https://openalex.org/keywords/phase-modulation","display_name":"Phase modulation","score":0.4424000084400177},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.3865000009536743},{"id":"https://openalex.org/keywords/frequency-modulation","display_name":"Frequency modulation","score":0.3725000023841858}],"concepts":[{"id":"https://openalex.org/C7720470","wikidata":"https://www.wikidata.org/wiki/Q954187","display_name":"Transceiver","level":3,"score":0.7763000130653381},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6711000204086304},{"id":"https://openalex.org/C2776951270","wikidata":"https://www.wikidata.org/wiki/Q8026910","display_name":"Wireline","level":3,"score":0.6276000142097473},{"id":"https://openalex.org/C47798520","wikidata":"https://www.wikidata.org/wiki/Q190157","display_name":"Transmitter","level":3,"score":0.5881999731063843},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5351999998092651},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5271999835968018},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5267999768257141},{"id":"https://openalex.org/C123079801","wikidata":"https://www.wikidata.org/wiki/Q750240","display_name":"Modulation (music)","level":2,"score":0.49050000309944153},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.4837000072002411},{"id":"https://openalex.org/C96834759","wikidata":"https://www.wikidata.org/wiki/Q750463","display_name":"Phase modulation","level":3,"score":0.4424000084400177},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.3865000009536743},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3776000142097473},{"id":"https://openalex.org/C11930861","wikidata":"https://www.wikidata.org/wiki/Q181417","display_name":"Frequency modulation","level":3,"score":0.3725000023841858},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.349700003862381},{"id":"https://openalex.org/C137800194","wikidata":"https://www.wikidata.org/wiki/Q11713455","display_name":"Interpolation (computer graphics)","level":3,"score":0.335099995136261},{"id":"https://openalex.org/C44280652","wikidata":"https://www.wikidata.org/wiki/Q104837","display_name":"Phase (matter)","level":2,"score":0.3346000015735626},{"id":"https://openalex.org/C207912722","wikidata":"https://www.wikidata.org/wiki/Q1259123","display_name":"Signal generator","level":3,"score":0.33410000801086426},{"id":"https://openalex.org/C43461449","wikidata":"https://www.wikidata.org/wiki/Q2495531","display_name":"EMI","level":3,"score":0.32919999957084656},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3237000107765198},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.3084999918937683},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.298799991607666},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.29499998688697815},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.2939999997615814},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.2921000123023987},{"id":"https://openalex.org/C148837635","wikidata":"https://www.wikidata.org/wiki/Q1742397","display_name":"Sawtooth wave","level":2,"score":0.2906999886035919},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.27950000762939453},{"id":"https://openalex.org/C166089067","wikidata":"https://www.wikidata.org/wiki/Q1227465","display_name":"Direct digital synthesizer","level":5,"score":0.2786000072956085},{"id":"https://openalex.org/C158411068","wikidata":"https://www.wikidata.org/wiki/Q2720568","display_name":"Digital control","level":2,"score":0.272599995136261},{"id":"https://openalex.org/C185177783","wikidata":"https://www.wikidata.org/wiki/Q3332814","display_name":"Megabit","level":2,"score":0.2721000015735626},{"id":"https://openalex.org/C74064498","wikidata":"https://www.wikidata.org/wiki/Q3396184","display_name":"Radio frequency","level":2,"score":0.26510000228881836},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.26330000162124634},{"id":"https://openalex.org/C507880516","wikidata":"https://www.wikidata.org/wiki/Q1257510","display_name":"Digital radio","level":2,"score":0.2624000012874603},{"id":"https://openalex.org/C110086884","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase detector","level":3,"score":0.26159998774528503},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.2603999972343445},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.2603999972343445},{"id":"https://openalex.org/C25915539","wikidata":"https://www.wikidata.org/wiki/Q220786","display_name":"Automatic frequency control","level":2,"score":0.25920000672340393},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.2583000063896179},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.25459998846054077},{"id":"https://openalex.org/C195251586","wikidata":"https://www.wikidata.org/wiki/Q1185939","display_name":"Demodulation","level":3,"score":0.25290000438690186},{"id":"https://openalex.org/C177502760","wikidata":"https://www.wikidata.org/wiki/Q782524","display_name":"Automatic gain control","level":4,"score":0.2500999867916107}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2025.3650194","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3650194","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.48356038331985474,"id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G1961117029","display_name":null,"funder_award_id":"114-2221-E-005-084-MY2","funder_id":"https://openalex.org/F4320331164","funder_display_name":"National Science and Technology Council"},{"id":"https://openalex.org/G2611447383","display_name":null,"funder_award_id":"112-2923-E-005-001-MY3","funder_id":"https://openalex.org/F4320331164","funder_display_name":"National Science and Technology Council"},{"id":"https://openalex.org/G2650485769","display_name":null,"funder_award_id":"114-2640-E-005-002","funder_id":"https://openalex.org/F4320331164","funder_display_name":"National Science and Technology Council"},{"id":"https://openalex.org/G6769853450","display_name":null,"funder_award_id":"112-2221-E-005-094-MY2","funder_id":"https://openalex.org/F4320331164","funder_display_name":"National Science and Technology Council"}],"funders":[{"id":"https://openalex.org/F4320331164","display_name":"National Science and Technology Council","ror":"https://ror.org/00wnb9798"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,20,91,98,121,127],"fully":[4],"integrated":[5],"2.9-Gb/s":[6],"spread-spectrum":[7],"clocking":[8],"(SSC)":[9],"wireline":[10],"transceiver":[11,141],"designed":[12],"for":[13,60],"high-speed":[14],"chip-to-chip":[15],"links.":[16],"The":[17],"architecture":[18],"combines":[19],"digitally":[21],"controlled":[22],"phase":[23,32,114],"interpolator":[24,33],"(DCPI)":[25],"in":[26,35,120],"the":[27,36,39,45,69,71,78,96,107,139,148],"transmitter":[28],"and":[29,44,64,76,110,116,125],"an":[30],"analog-controlled":[31],"(ACPI)":[34],"receiver,":[37,97],"leveraging":[38],"programmability":[40],"of":[41,48],"digital":[42],"control":[43,105],"low-jitter":[46],"performance":[47],"analog":[49],"control.":[50],"A":[51],"2.9-GHz":[52],"four-phase":[53],"phase-locked":[54],"loop":[55],"(PLL)":[56],"provides":[57],"reference":[58],"clocks":[59,75],"both":[61],"SSC":[62,108,149],"generation":[63],"clock/data":[65],"recovery":[66],"(CDR).":[67],"In":[68,95],"transmitter,":[70],"DCPI":[72],"synthesizes":[73],"SSC-modulated":[74],"drives":[77],"data":[79,111],"path,":[80],"supporting":[81],"downward":[82],"triangular":[83],"modulation":[84,93],"depths":[85],"up":[86,152],"to":[87,153],"3":[88],"%":[89],"at":[90],"44.25-kHz":[92],"frequency.":[94],"quarter-rate":[99],"SSC-compatible":[100],"CDR":[101],"with":[102,112,147],"hybrid":[103],"PI":[104],"recovers":[106],"clock":[109],"fine":[113],"alignment":[115],"low":[117],"jitter.":[118],"Fabricated":[119],"90-nm":[122],"CMOS":[123],"process":[124],"occupying":[126],"1.2":[128],"mm":[129,137],"<inline-formula":[130],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[131],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[132],"<tex-math":[133],"notation=\"LaTeX\">$\\times":[134],"1.2$</tex-math>":[135],"</inline-formula>":[136],"die,":[138],"proposed":[140],"achieves":[142],"robust":[143],"electromagnetic-interference":[144],"(EMI)":[145],"suppression,":[146],"generator":[150],"providing":[151],"26.78":[154],"dB":[155],"EMI":[156],"attenuation.":[157]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2026-01-14T00:00:00"}