{"id":"https://openalex.org/W7123358856","doi":"https://doi.org/10.1109/tcsi.2025.3648865","title":"PHENICS: A Scalable Neuromorphic FPGA Architecture for Million-Neuron Cortical Simulation With 4.6\u00d7 Real-Time Acceleration","display_name":"PHENICS: A Scalable Neuromorphic FPGA Architecture for Million-Neuron Cortical Simulation With 4.6\u00d7 Real-Time Acceleration","publication_year":2026,"publication_date":"2026-01-12","ids":{"openalex":"https://openalex.org/W7123358856","doi":"https://doi.org/10.1109/tcsi.2025.3648865"},"language":null,"primary_location":{"id":"doi:10.1109/tcsi.2025.3648865","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3648865","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5076836805","display_name":"Fanxi Yang","orcid":"https://orcid.org/0009-0008-6209-0810"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fanxi Yang","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0008-6209-0810","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5114202104","display_name":"Lufei Fan","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lufei Fan","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044278509","display_name":"Qi Jiang","orcid":"https://orcid.org/0000-0001-7122-3664"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qi Jiang","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100598212","display_name":"Yuhan He","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuhan He","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0002-0240-1898","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073706520","display_name":"Hanwen Ou","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hanwen Ou","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019624718","display_name":"He Xs","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xun He","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5122867903","display_name":"Li-Rong Zheng","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Li-Rong Zheng","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0001-9588-0239","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5122898909","display_name":"Zhuo Zou","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhuo Zou","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0002-8546-1329","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, School of Information Science and Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I24943067"],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":2.5155,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.83093078,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":"73","issue":"5","first_page":"3385","last_page":"3398"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9294000267982483,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9294000267982483,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10077","display_name":"Neuroscience and Neuropharmacology Research","score":0.008899999782443047,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.008299999870359898,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.8199999928474426},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6644999980926514},{"id":"https://openalex.org/keywords/spiking-neural-network","display_name":"Spiking neural network","score":0.6342999935150146},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.4537999927997589},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4424000084400177},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.3962000012397766},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.38929998874664307},{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.3878999948501587},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.38199999928474426},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.37599998712539673}],"concepts":[{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.8199999928474426},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8131999969482422},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6644999980926514},{"id":"https://openalex.org/C11731999","wikidata":"https://www.wikidata.org/wiki/Q9067355","display_name":"Spiking neural network","level":3,"score":0.6342999935150146},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.46779999136924744},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.4537999927997589},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4424000084400177},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.3962000012397766},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.38929998874664307},{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.3878999948501587},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.38199999928474426},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.37599998712539673},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3718000054359436},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.35260000824928284},{"id":"https://openalex.org/C153083717","wikidata":"https://www.wikidata.org/wiki/Q6535263","display_name":"Leverage (statistics)","level":2,"score":0.3224000036716461},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.31839999556541443},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.3174999952316284},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.3172000050544739},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.3073999881744385},{"id":"https://openalex.org/C193415008","wikidata":"https://www.wikidata.org/wiki/Q639681","display_name":"Network architecture","level":2,"score":0.2976999878883362},{"id":"https://openalex.org/C190475519","wikidata":"https://www.wikidata.org/wiki/Q544384","display_name":"Massively parallel","level":2,"score":0.2955999970436096},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.29280000925064087},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.2906999886035919},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.28790000081062317},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.28529998660087585},{"id":"https://openalex.org/C761482","wikidata":"https://www.wikidata.org/wiki/Q118093","display_name":"Transmission (telecommunications)","level":2,"score":0.28189998865127563},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.27570000290870667},{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.2711000144481659},{"id":"https://openalex.org/C91481028","wikidata":"https://www.wikidata.org/wiki/Q1054686","display_name":"Distributed memory","level":3,"score":0.27079999446868896},{"id":"https://openalex.org/C108583219","wikidata":"https://www.wikidata.org/wiki/Q197536","display_name":"Deep learning","level":2,"score":0.2669000029563904},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.25209999084472656},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.2513999938964844},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.2513999938964844}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2025.3648865","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3648865","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6307075619697571,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[{"id":"https://openalex.org/G3219446551","display_name":null,"funder_award_id":"62476062","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G7234679820","display_name":null,"funder_award_id":"92164301","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":49,"referenced_works":["https://openalex.org/W1604973310","https://openalex.org/W1857448332","https://openalex.org/W1921182138","https://openalex.org/W2027063265","https://openalex.org/W2069552454","https://openalex.org/W2087861759","https://openalex.org/W2088192327","https://openalex.org/W2102397476","https://openalex.org/W2130360162","https://openalex.org/W2153041354","https://openalex.org/W2153113253","https://openalex.org/W2571808120","https://openalex.org/W2770344141","https://openalex.org/W2783525259","https://openalex.org/W2801498385","https://openalex.org/W2904565241","https://openalex.org/W2919634026","https://openalex.org/W2921015455","https://openalex.org/W2974488061","https://openalex.org/W3004123481","https://openalex.org/W3006426821","https://openalex.org/W3009954736","https://openalex.org/W3037965865","https://openalex.org/W3087638917","https://openalex.org/W3102313165","https://openalex.org/W3118707936","https://openalex.org/W3141799644","https://openalex.org/W3154128550","https://openalex.org/W3214255576","https://openalex.org/W4206465987","https://openalex.org/W4210357113","https://openalex.org/W4214775604","https://openalex.org/W4214867079","https://openalex.org/W4220826395","https://openalex.org/W4223904523","https://openalex.org/W4226443758","https://openalex.org/W4285099903","https://openalex.org/W4285144618","https://openalex.org/W4312346940","https://openalex.org/W4312992603","https://openalex.org/W4366594037","https://openalex.org/W4386137619","https://openalex.org/W4387546361","https://openalex.org/W4390970539","https://openalex.org/W4396712890","https://openalex.org/W4401246517","https://openalex.org/W4406694068","https://openalex.org/W4409019733","https://openalex.org/W6921887444"],"related_works":[],"abstract_inverted_index":{"Traditional":[0],"brain":[1],"simulations":[2],"using":[3],"CPU/GPU":[4],"architectures":[5,43,66],"face":[6],"critical":[7],"limitations":[8],"in":[9,248],"both":[10],"speed":[11],"and":[12,28,31,41,64,119,128,149,218,250],"scalability,":[13],"particularly":[14],"when":[15],"modeling":[16],"large-scale":[17,96,156],"biological":[18],"neural":[19,46,98],"networks.":[20],"Cortical":[21,88],"models":[22],"exhibit":[23,67],"distinctive":[24],"features,":[25],"recurrent,":[26],"random":[27],"sparse":[29,220],"connectivity,":[30,73],"ultra-high":[32],"synaptic":[33,147,157,211],"density":[34],"that":[35],"fundamentally":[36],"differ":[37],"from":[38,55],"the":[39,102,134,163,192,236],"structured":[40],"dense":[42],"of":[44,191,241],"deep":[45],"networks":[47],"(DNNs).":[48],"As":[49],"a":[50,90,107,120,139,170],"result,":[51],"conventional":[52],"accelerators":[53],"suffer":[54],"inefficiencies:":[56],"communication":[57,103,226],"overhead":[58,213],"scales":[59],"linearly":[60],"with":[61,113,177,188,229],"neuron":[62,231],"count,":[63],"memory":[65,152,193],"poor":[68],"utilization":[69],"efficiency":[70],"under":[71],"complex":[72],"severely":[74],"constraining":[75],"scalability.":[76],"To":[77],"address":[78],"these":[79],"challenges,":[80],"we":[81,137],"presentPHENICS(Pyramidal":[82],"Hierarchical":[83],"Event-driven":[84],"Neuromorphic":[85],"Infrastructure":[86],"for":[87,95,154,238],"Simulation),":[89],"scalable":[91],"FPGA-based":[92],"architecture":[93,209],"tailored":[94],"spiking":[97],"network":[99,111,126],"simulations.":[100],"At":[101,133],"level,":[104,136],"PHENICS":[105,159],"introduces":[106],"pyramidal":[108],"multi-tier":[109],"on-chip":[110],"combined":[112],"aBusy-Aware":[114],"Threshold":[115],"Adaptation":[116],"(BATA)routing":[117],"strategy":[118],"lightweight":[121],"router":[122],"design":[123],"to":[124,144,204],"mitigate":[125],"congestion":[127],"improve":[129],"spike":[130],"transmission":[131],"efficiency.":[132],"storage":[135,212],"employ":[138],"multi-level":[140],"addressing":[141],"scheme":[142],"adapted":[143],"sparse,":[145],"irregular":[146],"connectivity":[148],"leverage":[150],"high-bandwidth":[151],"(HBM)":[153],"efficient":[155],"access.":[158],"is":[160],"implemented":[161],"on":[162,196],"Xilinx":[164],"Alveo":[165],"U50":[166],"system,":[167],"successfully":[168],"simulating":[169],"one-million-neuron":[171],"Leaky":[172],"Integrate-and-Fire":[173],"(LIF)":[174],"cortical":[175],"model":[176],"4":[178],"billion":[179],"synapses,":[180],"achieving":[181],"a$4.6\\times":[182],"$real-time":[183],"acceleration.":[184],"It":[185],"achieves":[186],"this":[187],"only":[189],"25%":[190],"bandwidth":[194],"available":[195],"GPU":[197],"platforms,":[198],"yet":[199],"delivers":[200],"a$5\\times":[201],"$speedup":[202],"compared":[203],"GPU-based":[205],"simulators.":[206],"Furthermore,":[207],"our":[208],"reduces":[210],"by$3\\times":[214],"$through":[215],"compressed":[216],"encoding":[217],"HBM-backed":[219],"addressing.":[221],"Moreover,":[222],"it":[223],"exhibits":[224],"sub-linear":[225],"time":[227],"growth":[228],"increasing":[230],"counts.":[232],"These":[233],"advancements":[234],"pave":[235],"way":[237],"real-time":[239],"simulation":[240],"billion-neuron":[242],"brain-scale":[243],"models,":[244],"opening":[245],"new":[246],"frontiers":[247],"neuroscience":[249],"neuromorphic":[251],"computing.":[252]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2026-01-14T00:00:00"}
