{"id":"https://openalex.org/W7108227773","doi":"https://doi.org/10.1109/tcsi.2025.3634760","title":"CAMPRO: A CAM-Based Processing-in-Memory Processor for Hyperdimensional Computing","display_name":"CAMPRO: A CAM-Based Processing-in-Memory Processor for Hyperdimensional Computing","publication_year":2025,"publication_date":"2025-12-02","ids":{"openalex":"https://openalex.org/W7108227773","doi":"https://doi.org/10.1109/tcsi.2025.3634760"},"language":null,"primary_location":{"id":"doi:10.1109/tcsi.2025.3634760","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3634760","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Yuhan He","orcid":"https://orcid.org/0009-0002-0240-1898"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuhan He","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Future Information Technology, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0002-0240-1898","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Future Information Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Tianxi Hu","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tianxi Hu","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Future Information Technology, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Future Information Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Anqin Xiao","orcid":"https://orcid.org/0009-0000-5390-4335"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Anqin Xiao","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Future Information Technology, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0000-5390-4335","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Future Information Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Fanxi Yang","orcid":"https://orcid.org/0009-0008-6209-0810"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fanxi Yang","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Future Information Technology, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0008-6209-0810","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Future Information Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Hengtan Zhang","orcid":"https://orcid.org/0009-0008-8393-6280"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hengtan Zhang","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Future Information Technology, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0008-8393-6280","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Future Information Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Li-Rong Zheng","orcid":"https://orcid.org/0000-0001-9588-0239"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Li-Rong Zheng","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Future Information Technology, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0001-9588-0239","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Future Information Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":null,"display_name":"Zhuo Zou","orcid":"https://orcid.org/0000-0002-8546-1329"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhuo Zou","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, College of Future Information Technology, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0002-8546-1329","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, College of Future Information Technology, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I24943067"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.45530079,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"73","issue":"6","first_page":"4232","last_page":"4245"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9830999970436096,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9830999970436096,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.005900000222027302,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.0038999998942017555,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.664900004863739},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.6466000080108643},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.5432000160217285},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5410000085830688},{"id":"https://openalex.org/keywords/inference","display_name":"Inference","score":0.5241000056266785},{"id":"https://openalex.org/keywords/encoding","display_name":"Encoding (memory)","score":0.4422000050544739},{"id":"https://openalex.org/keywords/stochastic-computing","display_name":"Stochastic computing","score":0.37299999594688416},{"id":"https://openalex.org/keywords/pruning","display_name":"Pruning","score":0.3587999939918518}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8367000222206116},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.664900004863739},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.6466000080108643},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.5432000160217285},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5410000085830688},{"id":"https://openalex.org/C2776214188","wikidata":"https://www.wikidata.org/wiki/Q408386","display_name":"Inference","level":2,"score":0.5241000056266785},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4867999851703644},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.4422000050544739},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4178999960422516},{"id":"https://openalex.org/C2780971903","wikidata":"https://www.wikidata.org/wiki/Q2933705","display_name":"Stochastic computing","level":3,"score":0.37299999594688416},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3718000054359436},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3634999990463257},{"id":"https://openalex.org/C108010975","wikidata":"https://www.wikidata.org/wiki/Q500094","display_name":"Pruning","level":2,"score":0.3587999939918518},{"id":"https://openalex.org/C90805587","wikidata":"https://www.wikidata.org/wiki/Q10944557","display_name":"Word (group theory)","level":2,"score":0.3447999954223633},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.3375999927520752},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33239999413490295},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.32359999418258667},{"id":"https://openalex.org/C53442348","wikidata":"https://www.wikidata.org/wiki/Q745101","display_name":"Content-addressable memory","level":3,"score":0.3061999976634979},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.2928999960422516},{"id":"https://openalex.org/C74912251","wikidata":"https://www.wikidata.org/wiki/Q6815727","display_name":"Memory footprint","level":2,"score":0.29100000858306885},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.2897999882698059},{"id":"https://openalex.org/C159423971","wikidata":"https://www.wikidata.org/wiki/Q177251","display_name":"Associative property","level":2,"score":0.2854999899864197},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.26350000500679016},{"id":"https://openalex.org/C21308566","wikidata":"https://www.wikidata.org/wiki/Q7169365","display_name":"Permutation (music)","level":2,"score":0.2624000012874603},{"id":"https://openalex.org/C2221639","wikidata":"https://www.wikidata.org/wiki/Q2877","display_name":"Discrete cosine transform","level":3,"score":0.2572000026702881},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.25529998540878296}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2025.3634760","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3634760","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.9168817400932312,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G3219446551","display_name":null,"funder_award_id":"62476062","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G7234679820","display_name":null,"funder_award_id":"92164301","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"This":[0],"work":[1],"introduces":[2],"CAMPRO,":[3],"a":[4,19,79,148],"Content":[5],"Addressable":[6],"Memory":[7],"(CAM)-based":[8],"Processing-In-Memory":[9],"(PIM)":[10],"processor":[11],"customized":[12],"for":[13,27,34],"Hyperdimensional":[14],"Computing":[15],"(HDC).":[16],"CAMPRO":[17,70,153,166],"leverages":[18],"6T":[20],"Split":[21],"Word":[22],"Lines":[23],"(SWL)":[24],"cell":[25],"structure":[26],"its":[28],"CAM,":[29],"enabling":[30],"efficient":[31,260],"column-wise":[32],"search":[33],"ultra-wide":[35],"Hypervector":[36],"(HV)":[37],"storage":[38],"and":[39,62,77,103,137,159,170,181,194,223,229,231,249],"an":[40,259],"optimized":[41],"associative":[42],"PIM":[43,93],"architecture":[44],"tailored":[45],"to":[46,66,83,108,128,199,212,238,253],"HDC":[47],"operations,":[48],"significantly":[49],"enhancing":[50],"energy":[51,138,192,208,225,245],"efficiency.":[52],"The":[53,95,112],"four":[54],"key":[55],"operators":[56],"of":[57,263],"HDC,":[58],"binding,":[59],"bundling,":[60],"permutation,":[61],"similarity,":[63],"are":[64],"mapped":[65],"the":[67,85,213,254],"proposed":[68],"architecture.":[69,94],"enhances":[71,244],"operational":[72],"parallelism":[73],"via":[74],"approximate":[75],"bundling":[76],"employs":[78],"hierarchical":[80],"permutation":[81],"method":[82],"mitigate":[84],"gap":[86],"in":[87,121,147],"flexible":[88],"shift":[89],"support":[90,109],"within":[91],"CAM-based":[92],"fine":[96],"grained":[97],"pipelined":[98],"operations":[99],"boost":[100],"processing":[101],"efficiency":[102,193,226,246],"dynamically":[104],"reclaim":[105],"memory":[106],"space":[107],"larger":[110],"models.":[111],"Two-Phase":[113],"Bit":[114],"Pruning":[115],"(TPBP)":[116],"strategy":[117],"prunes":[118],"redundant":[119],"bits":[120],"class":[122],"HVs":[123],"across":[124,172],"two":[125],"computing":[126],"stages":[127],"eliminate":[129],"unnecessary":[130],"computations,":[131],"reducing":[132],"operation":[133],"counts":[134],"by":[135,140,209,227,235,247,251],"73.6%":[136],"consumption":[139],"65.2%":[141],"while":[142],"maintaining":[143],"query":[144],"precision.":[145],"Simulated":[146],"22":[149],"nm":[150],"CMOS":[151],"process,":[152],"occupies":[154],"1.13":[155],"mm<sup":[156],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[157],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[158],"consumes":[160],"0.99":[161],"mW":[162],"at":[163],"200":[164],"MHz.":[165],"demonstrates":[167],"robust":[168],"versatility":[169],"scalability":[171],"five":[173],"datasets,":[174],"including":[175],"MUTAG,":[176],"CIFAR10,":[177],"MNIST,":[178,242],"language":[179,203],"classification,":[180,204],"EMG":[182,217],"gesture":[183,218],"recognition,":[184,219],"using":[185],"diverse":[186],"encoding":[187],"schemes.":[188],"It":[189],"achieves":[190],"excellent":[191],"low":[195],"latency":[196,234,250],"from":[197],"small":[198],"large-scale":[200],"datasets.":[201],"In":[202],"it":[205,220,243,258],"reduces":[206],"inference":[207,224,233],"99.2%":[210],"compared":[211,237],"similiar":[214],"work.":[215],"For":[216],"improves":[221],"training":[222],"2.6x":[228],"6.7x,":[230],"reduce":[232],"73x":[236],"related":[239],"works.":[240],"On":[241],"11.3x":[248],"1.6x":[252],"prior":[255],"work,":[256],"making":[257],"Artificial":[261],"Intelligence":[262],"Things":[264],"(AIoT)":[265],"solution.":[266]},"counts_by_year":[],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-12-03T00:00:00"}