{"id":"https://openalex.org/W4416078061","doi":"https://doi.org/10.1109/tcsi.2025.3628957","title":"A 6.8-GHz Fractional-N Pulse-Shaper-Based PLL Achieving \u2212269.9-dB FoM <sub>Jitter-N-Area</sub>","display_name":"A 6.8-GHz Fractional-N Pulse-Shaper-Based PLL Achieving \u2212269.9-dB FoM <sub>Jitter-N-Area</sub>","publication_year":2025,"publication_date":"2025-11-10","ids":{"openalex":"https://openalex.org/W4416078061","doi":"https://doi.org/10.1109/tcsi.2025.3628957"},"language":null,"primary_location":{"id":"doi:10.1109/tcsi.2025.3628957","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3628957","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103039608","display_name":"Haoyuan Gao","orcid":"https://orcid.org/0009-0005-2076-8927"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Haoyuan Gao","raw_affiliation_strings":["State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0005-2076-8927","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4210119392","https://openalex.org/I4210132426"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100642945","display_name":"Yan Liu","orcid":"https://orcid.org/0000-0002-7279-997X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yan Liu","raw_affiliation_strings":["State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4210119392","https://openalex.org/I4210132426"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111117786","display_name":"Peifang Wu","orcid":"https://orcid.org/0009-0003-5985-2398"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Peifang Wu","raw_affiliation_strings":["State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0003-5985-2398","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4210119392","https://openalex.org/I4210132426"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5115595112","display_name":"Jiao Liu","orcid":"https://orcid.org/0009-0001-8953-883X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jiao Liu","raw_affiliation_strings":["State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4210119392","https://openalex.org/I4210132426"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000534045","display_name":"Yiyun Mao","orcid":"https://orcid.org/0009-0008-4465-6809"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yiyun Mao","raw_affiliation_strings":["State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0008-4465-6809","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4210119392","https://openalex.org/I4210132426"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027330257","display_name":"Xinyi Lin","orcid":"https://orcid.org/0000-0001-6740-1878"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xinyi Lin","raw_affiliation_strings":["State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0001-6740-1878","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4210119392","https://openalex.org/I4210132426"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109764765","display_name":"Yin Rui","orcid":"https://orcid.org/0009-0001-2447-4601"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Rui Yin","raw_affiliation_strings":["State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0001-2447-4601","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4210119392","https://openalex.org/I4210132426"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045635010","display_name":"Ping Lu","orcid":"https://orcid.org/0000-0002-0111-0573"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ping Lu","raw_affiliation_strings":["NVIDIA Inc., Santa Clara, CA, USA"],"raw_orcid":"https://orcid.org/0000-0002-0111-0573","affiliations":[{"raw_affiliation_string":"NVIDIA Inc., Santa Clara, CA, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023124977","display_name":"Long Kong","orcid":"https://orcid.org/0000-0002-6568-3071"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Long Kong","raw_affiliation_strings":["State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0002-6568-3071","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4210119392","https://openalex.org/I4210132426"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5083182163","display_name":"Na Yan","orcid":"https://orcid.org/0000-0001-7012-404X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Na Yan","raw_affiliation_strings":["State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0001-7012-404X","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4210119392","https://openalex.org/I4210132426"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.20744646,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"73","issue":"4","first_page":"2425","last_page":"2437"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9925000071525574,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9925000071525574,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.003599999938160181,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.00039999998989515007,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.753000020980835},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.6395000219345093},{"id":"https://openalex.org/keywords/dbc","display_name":"dBc","score":0.560699999332428},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.5447999835014343},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.5329999923706055},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5073999762535095},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.5015000104904175},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.45320001244544983},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.37880000472068787}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.753000020980835},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.6395000219345093},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6233000159263611},{"id":"https://openalex.org/C193523891","wikidata":"https://www.wikidata.org/wiki/Q1771950","display_name":"dBc","level":3,"score":0.560699999332428},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.5447999835014343},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.5329999923706055},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5073999762535095},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.5015000104904175},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.45320001244544983},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.40849998593330383},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3901999890804291},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.37880000472068787},{"id":"https://openalex.org/C9387945","wikidata":"https://www.wikidata.org/wiki/Q4854770","display_name":"Bandwidth extension","level":4,"score":0.3666999936103821},{"id":"https://openalex.org/C205606062","wikidata":"https://www.wikidata.org/wiki/Q5249645","display_name":"Decoupling (probability)","level":2,"score":0.35280001163482666},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3463999927043915},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.3456999957561493},{"id":"https://openalex.org/C158622935","wikidata":"https://www.wikidata.org/wiki/Q660848","display_name":"Nonlinear system","level":2,"score":0.3452000021934509},{"id":"https://openalex.org/C77881186","wikidata":"https://www.wikidata.org/wiki/Q7119642","display_name":"PLL multibit","level":4,"score":0.29660001397132874},{"id":"https://openalex.org/C131782439","wikidata":"https://www.wikidata.org/wiki/Q1455581","display_name":"Frequency compensation","level":4,"score":0.29420000314712524},{"id":"https://openalex.org/C2780023022","wikidata":"https://www.wikidata.org/wiki/Q1338171","display_name":"Compensation (psychology)","level":2,"score":0.29280000925064087},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.2890999913215637},{"id":"https://openalex.org/C110086884","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase detector","level":3,"score":0.28299999237060547},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.2718999981880188},{"id":"https://openalex.org/C49319798","wikidata":"https://www.wikidata.org/wiki/Q5502874","display_name":"Frequency offset","level":4,"score":0.2712000012397766},{"id":"https://openalex.org/C2776158855","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase frequency detector","level":5,"score":0.2667999863624573},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.2542000114917755},{"id":"https://openalex.org/C144534570","wikidata":"https://www.wikidata.org/wiki/Q5325","display_name":"Inductor","level":3,"score":0.2533999979496002}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2025.3628957","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3628957","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G1284402754","display_name":null,"funder_award_id":"92473109","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G2344047301","display_name":null,"funder_award_id":"2022YFB4401200","funder_id":"https://openalex.org/F4320335777","funder_display_name":"National Key Research and Development Program of China"},{"id":"https://openalex.org/G8331894299","display_name":null,"funder_award_id":"62434003","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320335777","display_name":"National Key Research and Development Program of China","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,11,16,35,65,98,104],"6.8-GHz":[4],"compact":[5],"digital":[6,55],"fractional-N":[7],"PLL":[8,71],"based":[9],"on":[10],"pulse-shaped":[12],"loop":[13,17],"filter,":[14],"enabling":[15],"bandwidth":[18],"of":[19,46,86,101,113],"<inline-formula":[20,73,105],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[21,74,106],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[22,75,107],"<tex-math":[23,76,108],"notation=\"LaTeX\">$0.26f_{ref}$</tex-math>":[24],"</inline-formula>":[25,79,112],"to":[26,42],"suppress":[27],"the":[28,47,60,69],"ring":[29],"oscillator\u2019s":[30],"phase":[31],"noise.":[32],"It":[33],"leverages":[34],"constant-slope":[36],"DTC":[37],"with":[38,97],"range":[39],"extension":[40],"technique":[41],"save":[43],"50%":[44],"area":[45],"capacitor":[48],"array.":[49],"The":[50],"embedded":[51],"nonlinearity":[52],"cancellation":[53],"and":[54,89],"offset":[56],"compensation":[57],"further":[58],"improve":[59],"spectrum":[61],"purity.":[62],"Fabricated":[63],"in":[64],"28-nm":[66],"CMOS":[67],"process,":[68],"pulse-shaper-based":[70],"occupies":[72],"notation=\"LaTeX\">$\\text":[77,109],"{0.025mm}^{{2}}$</tex-math>":[78],"core":[80],"area,":[81],"achieves":[82],"an":[83],"integrated":[84],"jitter":[85],"804":[87],"fs":[88],"\u221253.2":[90],"dBc":[91],"fractional":[92],"spur":[93],"at":[94],"near-integer":[95],"channels":[96],"power":[99],"consumption":[100],"5.68mW,":[102],"obtaining":[103],"{FoM}_{\\text":[110],"{Jitter-N-Area}}$</tex-math>":[111],"\u2212269.9":[114],"dB.":[115]},"counts_by_year":[],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-11-10T00:00:00"}