{"id":"https://openalex.org/W4416113884","doi":"https://doi.org/10.1109/tcsi.2025.3627573","title":"A Simultaneous Bidirectional Link With 6\u201312.8-Gb/s Forward and 12\u201325.6-Gb/s Backward Channels for System Chips Interconnects","display_name":"A Simultaneous Bidirectional Link With 6\u201312.8-Gb/s Forward and 12\u201325.6-Gb/s Backward Channels for System Chips Interconnects","publication_year":2025,"publication_date":"2025-11-11","ids":{"openalex":"https://openalex.org/W4416113884","doi":"https://doi.org/10.1109/tcsi.2025.3627573"},"language":null,"primary_location":{"id":"doi:10.1109/tcsi.2025.3627573","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3627573","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5052066341","display_name":"Huihong Mo","orcid":"https://orcid.org/0009-0006-8519-2639"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hao-Kai Mo","raw_affiliation_strings":["Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101678804","display_name":"Yuping Huang","orcid":"https://orcid.org/0000-0002-8599-2883"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yu-Ping Huang","raw_affiliation_strings":["Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan"],"raw_orcid":"https://orcid.org/0000-0002-8599-2883","affiliations":[{"raw_affiliation_string":"Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055627748","display_name":"You-Cheng Tu","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"You-Cheng Tu","raw_affiliation_strings":["Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042049354","display_name":"Wei\u2010Zen Chen","orcid":"https://orcid.org/0000-0003-2840-0754"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Wei-Zen Chen","raw_affiliation_strings":["Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan"],"raw_orcid":"https://orcid.org/0000-0003-2840-0754","affiliations":[{"raw_affiliation_string":"Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.28584705,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"73","issue":"3","first_page":"1913","last_page":"1923"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.833899974822998,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.833899974822998,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.04969999939203262,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.047600001096725464,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transceiver","display_name":"Transceiver","score":0.8833000063896179},{"id":"https://openalex.org/keywords/transmitter","display_name":"Transmitter","score":0.7440000176429749},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6380000114440918},{"id":"https://openalex.org/keywords/ranging","display_name":"Ranging","score":0.5940999984741211},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5497999787330627},{"id":"https://openalex.org/keywords/host","display_name":"Host (biology)","score":0.453900009393692},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.44429999589920044},{"id":"https://openalex.org/keywords/data-link","display_name":"Data link","score":0.43299999833106995},{"id":"https://openalex.org/keywords/link","display_name":"Link (geometry)","score":0.42149999737739563}],"concepts":[{"id":"https://openalex.org/C7720470","wikidata":"https://www.wikidata.org/wiki/Q954187","display_name":"Transceiver","level":3,"score":0.8833000063896179},{"id":"https://openalex.org/C47798520","wikidata":"https://www.wikidata.org/wiki/Q190157","display_name":"Transmitter","level":3,"score":0.7440000176429749},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6380000114440918},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6287999749183655},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6029000282287598},{"id":"https://openalex.org/C115051666","wikidata":"https://www.wikidata.org/wiki/Q6522493","display_name":"Ranging","level":2,"score":0.5940999984741211},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5497999787330627},{"id":"https://openalex.org/C126831891","wikidata":"https://www.wikidata.org/wiki/Q221673","display_name":"Host (biology)","level":2,"score":0.453900009393692},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.44429999589920044},{"id":"https://openalex.org/C182132293","wikidata":"https://www.wikidata.org/wiki/Q1172466","display_name":"Data link","level":2,"score":0.43299999833106995},{"id":"https://openalex.org/C2778753846","wikidata":"https://www.wikidata.org/wiki/Q6554239","display_name":"Link (geometry)","level":2,"score":0.42149999737739563},{"id":"https://openalex.org/C123079801","wikidata":"https://www.wikidata.org/wiki/Q750240","display_name":"Modulation (music)","level":2,"score":0.4207000136375427},{"id":"https://openalex.org/C20518276","wikidata":"https://www.wikidata.org/wiki/Q186130","display_name":"Pulse-amplitude modulation","level":4,"score":0.40790000557899475},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38839998841285706},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.3700000047683716},{"id":"https://openalex.org/C93226319","wikidata":"https://www.wikidata.org/wiki/Q193137","display_name":"Differential (mechanical device)","level":2,"score":0.3264999985694885},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3237000107765198},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.29339998960494995},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.27219998836517334},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.2687000036239624},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.2671000063419342},{"id":"https://openalex.org/C74064498","wikidata":"https://www.wikidata.org/wiki/Q3396184","display_name":"Radio frequency","level":2,"score":0.26589998602867126},{"id":"https://openalex.org/C11930861","wikidata":"https://www.wikidata.org/wiki/Q181417","display_name":"Frequency modulation","level":3,"score":0.26190000772476196},{"id":"https://openalex.org/C12430449","wikidata":"https://www.wikidata.org/wiki/Q7280888","display_name":"Radio Link Protocol","level":3,"score":0.25679999589920044},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.25619998574256897},{"id":"https://openalex.org/C111106434","wikidata":"https://www.wikidata.org/wiki/Q1072430","display_name":"Die (integrated circuit)","level":2,"score":0.250900000333786}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2025.3627573","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3627573","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G2480516557","display_name":null,"funder_award_id":"113-2640-E-A49-006","funder_id":"https://openalex.org/F4320331164","funder_display_name":"National Science and Technology Council"}],"funders":[{"id":"https://openalex.org/F4320322410","display_name":"MediaTek","ror":"https://ror.org/05g9jck81"},{"id":"https://openalex.org/F4320331164","display_name":"National Science and Technology Council","ror":"https://ror.org/00wnb9798"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"This":[0,70],"article":[1],"presents":[2],"the":[3,19,30,54,67,77,106,110,115,140,144],"design":[4],"of":[5,166],"simultaneous":[6],"bidirectional":[7],"(SBD)":[8],"transceivers":[9],"(TRX)":[10],"for":[11,79,139],"system":[12],"chips":[13],"interconnects.":[14],"Implemented":[15],"on":[16],"differential":[17],"channels,":[18],"forward":[20,87],"link":[21,32,85,113],"employs":[22],"common-mode":[23],"non-return":[24],"to":[25,93,102,123],"zero":[26],"(NRZ)":[27],"signaling,":[28],"while":[29],"backward":[31,97],"utilizes":[33],"differential-mode":[34],"4-level":[35],"pulse":[36],"amplitude":[37],"modulation":[38],"(PAM-4)":[39],"signaling.":[40],"The":[41,83,136,159],"SBD":[42,84,112,160],"transceiver":[43,161],"architecture":[44],"integrates":[45],"an":[46,59,163],"NRZ":[47,60],"transmitter":[48],"and":[49,62,96,143,153],"two":[50,63],"PAM-4":[51,64],"receivers":[52],"in":[53,66],"Host":[55,141],"Chip,":[56],"paired":[57],"with":[58],"receiver":[61],"transmitters":[65],"Client":[68,145],"Chip.":[69],"configuration":[71],"enables":[72],"source-synchronous,":[73],"multi-rate":[74],"operation":[75],"without":[76],"need":[78],"explicit":[80],"clock":[81],"channels.":[82],"supports":[86],"data":[88,98,118],"rates":[89,99],"ranging":[90],"from":[91,100],"6":[92],"12.8":[94],"Gbps":[95],"12":[101],"25.6":[103],"Gbps.":[104],"To":[105],"authors\u2019":[107],"best":[108],"knowledge,":[109],"proposed":[111],"achieves":[114],"broadest":[116],"tunable":[117],"rate":[119],"as":[120],"is":[121,128],"reported":[122],"date.":[124],"An":[125],"experimental":[126],"prototype":[127],"implemented":[129],"using":[130],"a":[131],"TSMC":[132],"28nm":[133],"CMOS":[134],"process.":[135],"die":[137],"areas":[138],"Chip":[142,146],"are":[147],"approximately":[148,167],"0.46":[149],"mm<sup":[150,155],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[151,156],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[152,157],"0.28":[154],"respectively.":[158],"demonstrates":[162],"energy":[164],"efficiency":[165],"2.5":[168],"pJ/b.":[169]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-11-11T00:00:00"}
