{"id":"https://openalex.org/W4416716388","doi":"https://doi.org/10.1109/tcsi.2025.3615646","title":"A Self-Supervised Learning of a Foundation Model for Analog Layout Design Automation","display_name":"A Self-Supervised Learning of a Foundation Model for Analog Layout Design Automation","publication_year":2025,"publication_date":"2025-10-06","ids":{"openalex":"https://openalex.org/W4416716388","doi":"https://doi.org/10.1109/tcsi.2025.3615646"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2025.3615646","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3615646","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["arxiv","crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://arxiv.org/pdf/2503.22143","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5077154789","display_name":"Sungyu Jeong","orcid":null},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sungyu Jeong","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology, Pohang-si, South Korea"],"raw_orcid":"https://orcid.org/0009-0008-1971-9732","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology, Pohang-si, South Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Won Joon Choi","orcid":"https://orcid.org/0009-0008-9769-9263"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Won Joon Choi","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology, Pohang-si, South Korea"],"raw_orcid":"https://orcid.org/0009-0008-9769-9263","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology, Pohang-si, South Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070568091","display_name":"Junung Choi","orcid":"https://orcid.org/0009-0005-1663-0140"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Junung Choi","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology, Pohang-si, South Korea"],"raw_orcid":"https://orcid.org/0009-0005-1663-0140","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology, Pohang-si, South Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073595255","display_name":"Anik Biswas","orcid":"https://orcid.org/0000-0002-1971-6872"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Anik Biswas","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology, Pohang-si, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology, Pohang-si, South Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052722005","display_name":"Byungsub Kim","orcid":"https://orcid.org/0000-0003-1528-6235"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Byungsub Kim","raw_affiliation_strings":["Department of Electrical Engineering, the Department of Convergence IT Engineering, the Department of Semiconductor Engineering, Graduate School of Semiconductor Technology, Pohang University of Science and Technology, Pohang-si, South Korea"],"raw_orcid":"https://orcid.org/0000-0003-1528-6235","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, the Department of Convergence IT Engineering, the Department of Semiconductor Engineering, Graduate School of Semiconductor Technology, Pohang University of Science and Technology, Pohang-si, South Korea","institution_ids":["https://openalex.org/I123900574"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I123900574"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.22086854,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"73","issue":"2","first_page":"1220","last_page":"1230"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.6937999725341797,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.6937999725341797,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.07050000131130219,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.047600001096725464,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/page-layout","display_name":"Page layout","score":0.6116999983787537},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6071000099182129},{"id":"https://openalex.org/keywords/ic-layout-editor","display_name":"IC layout editor","score":0.5837000012397766},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.5684999823570251},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.5598999857902527},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.5464000105857849},{"id":"https://openalex.org/keywords/design-layout-record","display_name":"Design layout record","score":0.5231999754905701},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.5157999992370605},{"id":"https://openalex.org/keywords/masking","display_name":"Masking (illustration)","score":0.4837000072002411}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6664999723434448},{"id":"https://openalex.org/C188985296","wikidata":"https://www.wikidata.org/wiki/Q868954","display_name":"Page layout","level":2,"score":0.6116999983787537},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6071000099182129},{"id":"https://openalex.org/C5546195","wikidata":"https://www.wikidata.org/wiki/Q5969842","display_name":"IC layout editor","level":5,"score":0.5837000012397766},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.5684999823570251},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.5598999857902527},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.5464000105857849},{"id":"https://openalex.org/C179145894","wikidata":"https://www.wikidata.org/wiki/Q5264353","display_name":"Design layout record","level":5,"score":0.5231999754905701},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.5157999992370605},{"id":"https://openalex.org/C2777402240","wikidata":"https://www.wikidata.org/wiki/Q6783436","display_name":"Masking (illustration)","level":2,"score":0.4837000072002411},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.4690000116825104},{"id":"https://openalex.org/C2776207758","wikidata":"https://www.wikidata.org/wiki/Q5303302","display_name":"Downstream (manufacturing)","level":2,"score":0.4088999927043915},{"id":"https://openalex.org/C199639397","wikidata":"https://www.wikidata.org/wiki/Q1788588","display_name":"Engineering drawing","level":1,"score":0.39149999618530273},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.38580000400543213},{"id":"https://openalex.org/C136197465","wikidata":"https://www.wikidata.org/wiki/Q1729295","display_name":"Variety (cybernetics)","level":2,"score":0.3840999901294708},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.38350000977516174},{"id":"https://openalex.org/C108882727","wikidata":"https://www.wikidata.org/wiki/Q2991685","display_name":"Solid modeling","level":2,"score":0.3734999895095825},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3476000130176544},{"id":"https://openalex.org/C124101348","wikidata":"https://www.wikidata.org/wiki/Q172491","display_name":"Data mining","level":1,"score":0.3361000120639801},{"id":"https://openalex.org/C2780966255","wikidata":"https://www.wikidata.org/wiki/Q5474306","display_name":"Foundation (evidence)","level":2,"score":0.32589998841285706},{"id":"https://openalex.org/C22029948","wikidata":"https://www.wikidata.org/wiki/Q45089","display_name":"Dice","level":2,"score":0.3125},{"id":"https://openalex.org/C67186912","wikidata":"https://www.wikidata.org/wiki/Q367664","display_name":"Data modeling","level":2,"score":0.3010999858379364},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.2939000129699707},{"id":"https://openalex.org/C119823426","wikidata":"https://www.wikidata.org/wiki/Q184793","display_name":"Computer Aided Design","level":2,"score":0.28450000286102295},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.2743000090122223},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.26010000705718994},{"id":"https://openalex.org/C22367795","wikidata":"https://www.wikidata.org/wiki/Q7625208","display_name":"Structured prediction","level":2,"score":0.25999999046325684},{"id":"https://openalex.org/C136389625","wikidata":"https://www.wikidata.org/wiki/Q334384","display_name":"Supervised learning","level":3,"score":0.2538999915122986},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.2531999945640564},{"id":"https://openalex.org/C175154964","wikidata":"https://www.wikidata.org/wiki/Q380077","display_name":"Task analysis","level":3,"score":0.251800000667572}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcsi.2025.3615646","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3615646","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},{"id":"pmh:oai:arXiv.org:2503.22143","is_oa":true,"landing_page_url":"http://arxiv.org/abs/2503.22143","pdf_url":"https://arxiv.org/pdf/2503.22143","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"}],"best_oa_location":{"id":"pmh:oai:arXiv.org:2503.22143","is_oa":true,"landing_page_url":"http://arxiv.org/abs/2503.22143","pdf_url":"https://arxiv.org/pdf/2503.22143","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"We":[0],"propose":[1,35],"a":[2,50,127,224,230],"UNet-based":[3],"foundation":[4,84,135],"model":[5,85,128,136,195],"and":[6,23,39,65,113,166,229],"its":[7],"self-supervised":[8,32],"learning":[9],"method":[10],"to":[11,44,125,210],"address":[12],"two":[13],"key":[14],"challenges:":[15],"1)lack":[16],"of":[17,72,189,207,216],"qualified":[18,73],"annotated":[19],"analog":[20,27,148],"layout":[21,28,53,74,92,103,182],"data,":[22,81,221],"2)excessive":[24],"variety":[25],"in":[26],"design":[29],"tasks.":[30],"For":[31],"learning,":[33],"we":[34],"random":[36,40],"patch":[37],"sampling":[38],"masking":[41],"techniques":[42],"automatically":[43],"obtain":[45],"enough":[46,67],"training":[47,193,236],"data":[48,57,209],"from":[49,143,196,237],"small":[51,106],"unannotated":[52],"dataset.":[54],"The":[55,169],"obtained":[56,80,142],"are":[58],"greatly":[59],"augmented,":[60],"less":[61],"biased,":[62],"equally":[63],"sized,":[64],"contain":[66],"information":[68],"for":[69,100,116,154,176,187,198],"excessive":[70],"varieties":[71],"patterns.":[75],"By":[76],"pre-training":[77],"with":[78,105,192],"the":[79,82,121,134,155,194,199,208,212,219],"proposed":[83],"can":[86,97],"learn":[87],"implicit":[88],"general":[89],"knowledge":[90],"on":[91],"patterns":[93],"so":[94],"that":[95],"it":[96,151],"be":[98],"fine-tuned":[99,153,170],"various":[101],"downstream":[102,118,158],"tasks":[104,175],"task-specific":[107],"datasets.":[108],"Fine-tuning":[109],"provides":[110],"an":[111],"efficient":[112],"consolidated":[114],"methodology":[115],"diverse":[117],"tasks,":[119],"reducing":[120],"enormous":[122],"human":[123],"effort":[124],"develop":[126],"per":[129],"task":[130],"separately.":[131],"In":[132],"experiments,":[133],"was":[137,152],"pre-trained":[138],"using":[139],"324,000":[140],"samples":[141],"6":[144],"silicon-proved":[145],"manually":[146],"designed":[147],"circuits,":[149],"then":[150],"five":[156],"example":[157],"tasks:":[159],"generating":[160,184],"contacts,":[161],"vias,":[162],"dummy":[163],"fingers,":[164],"N-wells,":[165],"metal":[167,200],"routings.":[168],"models":[171],"successfully":[172],"performed":[173],"these":[174],"more":[177],"than":[178,235],"one":[179],"thousand":[180],"unseen":[181],"inputs,":[183],"DRC/LVS-clean":[185],"layouts":[186],"96.6%":[188],"samples.":[190],"Compared":[191],"scratch":[197],"routing":[201],"task,":[202],"fine-tuning":[203,222],"required":[204],"only":[205],"1/8":[206],"achieve":[211],"same":[213,220],"dice":[214],"score":[215,234],"0.95.":[217],"With":[218],"achieved":[223],"90%":[225],"lower":[226],"validation":[227],"loss":[228],"40%":[231],"higher":[232],"benchmark":[233],"scratch.":[238]},"counts_by_year":[],"updated_date":"2026-07-28T07:46:37.118299","created_date":"2025-10-10T00:00:00"}