{"id":"https://openalex.org/W4413979637","doi":"https://doi.org/10.1109/tcsi.2025.3605023","title":"A 13-GS/s 9-bit Time-Interleaved Pipelined-SAR ADC With Common-Mode Regulated Floating-Inverter-Amplifier and Rapid-Tracking Bootstrapped Switch","display_name":"A 13-GS/s 9-bit Time-Interleaved Pipelined-SAR ADC With Common-Mode Regulated Floating-Inverter-Amplifier and Rapid-Tracking Bootstrapped Switch","publication_year":2025,"publication_date":"2025-09-04","ids":{"openalex":"https://openalex.org/W4413979637","doi":"https://doi.org/10.1109/tcsi.2025.3605023"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2025.3605023","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3605023","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017191320","display_name":"Ji Guo","orcid":"https://orcid.org/0009-0008-8990-436X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ji Guo","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems and the Frontier Institute of Chips and Systems, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems and the Frontier Institute of Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Jianwei Liu","orcid":"https://orcid.org/0009-0002-9344-8180"},"institutions":[{"id":"https://openalex.org/I10535382","display_name":"Chongqing University of Posts and Telecommunications","ror":"https://ror.org/03dgaqz26","country_code":"CN","type":"education","lineage":["https://openalex.org/I10535382"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jianwei Liu","raw_affiliation_strings":["School of Integrated Circuits, Chongqing University of Posts and Telecommunications, Chongqing, China"],"raw_orcid":"https://orcid.org/0009-0002-9344-8180","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Chongqing University of Posts and Telecommunications, Chongqing, China","institution_ids":["https://openalex.org/I10535382"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078440143","display_name":"Danfeng Zhai","orcid":"https://orcid.org/0000-0002-1616-9906"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Danfeng Zhai","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems and the Frontier Institute of Chips and Systems, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0002-1616-9906","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems and the Frontier Institute of Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5115547209","display_name":"Xinsheng Wang","orcid":"https://orcid.org/0000-0002-7528-4621"},"institutions":[{"id":"https://openalex.org/I204983213","display_name":"Harbin Institute of Technology","ror":"https://ror.org/01yqg2h08","country_code":"CN","type":"education","lineage":["https://openalex.org/I204983213"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xinsheng Wang","raw_affiliation_strings":["Harbin Institute of Technology at Weihai, Weihai, China"],"raw_orcid":"https://orcid.org/0000-0002-7528-4621","affiliations":[{"raw_affiliation_string":"Harbin Institute of Technology at Weihai, Weihai, China","institution_ids":["https://openalex.org/I204983213"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028632487","display_name":"Wenning Jiang","orcid":"https://orcid.org/0000-0002-8585-2813"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wenning Jiang","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems and the Frontier Institute of Chips and Systems, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0002-8585-2813","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems and the Frontier Institute of Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100453158","display_name":"Qi Liu","orcid":"https://orcid.org/0000-0001-7062-831X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qi Liu","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems and the Frontier Institute of Chips and Systems, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0001-7062-831X","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems and the Frontier Institute of Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100347744","display_name":"Ming Liu","orcid":"https://orcid.org/0000-0001-7537-5462"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ming Liu","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems and the Frontier Institute of Chips and Systems, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems and the Frontier Institute of Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.18477624,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"73","issue":"4","first_page":"2357","last_page":"2370"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.5301246047019958},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.5226806998252869},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5225643515586853},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49450942873954773},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.4814959764480591},{"id":"https://openalex.org/keywords/tracking","display_name":"Tracking (education)","score":0.43956151604652405},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.35952073335647583},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.34418100118637085},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.32043078541755676},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23549175262451172},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.19017294049263}],"concepts":[{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.5301246047019958},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.5226806998252869},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5225643515586853},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49450942873954773},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.4814959764480591},{"id":"https://openalex.org/C2775936607","wikidata":"https://www.wikidata.org/wiki/Q466845","display_name":"Tracking (education)","level":2,"score":0.43956151604652405},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.35952073335647583},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.34418100118637085},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.32043078541755676},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23549175262451172},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.19017294049263},{"id":"https://openalex.org/C19417346","wikidata":"https://www.wikidata.org/wiki/Q7922","display_name":"Pedagogy","level":1,"score":0.0},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2025.3605023","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3605023","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G434215627","display_name":null,"funder_award_id":"62304053,","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G8398736718","display_name":null,"funder_award_id":"23YF1402300","funder_id":"https://openalex.org/F4320321885","funder_display_name":"Science and Technology Commission of Shanghai Municipality"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320321885","display_name":"Science and Technology Commission of Shanghai Municipality","ror":"https://ror.org/03kt66j61"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2899084033","https://openalex.org/W3014521742","https://openalex.org/W4398198689","https://openalex.org/W2354365353","https://openalex.org/W1988437325","https://openalex.org/W2617868873","https://openalex.org/W98453623","https://openalex.org/W2340624421","https://openalex.org/W4391823081","https://openalex.org/W2109469245"],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"a":[3,68,94,124],"13GS/s":[4],"9-bit":[5],"8-channel":[6],"time-interleaved":[7],"(TI)":[8],"Pipelined-SAR":[9],"(Pipe-SAR)":[10],"ADC.":[11],"A":[12],"common-mode":[13,22,39,152],"regulated":[14],"floating-inverter-amplifier":[15],"(CMR-FIA)":[16],"is":[17,73,91,93,146],"proposed":[18,57,140],"to":[19,26,75,156],"overcome":[20],"the":[21,27,31,36,45,56,60,97,110,139,142,150],"voltage":[23],"variation":[24,145],"due":[25],"charge":[28],"leakage":[29],"through":[30],"parasitic":[32],"capacitor,":[33],"thereby":[34],"eliminating":[35],"need":[37],"for":[38],"feedback":[40],"(CMFB)":[41],"circuitry":[42],"embedded":[43],"in":[44,82],"body":[46],"of":[47,127,136,154],"FIA.":[48],"By":[49],"combining":[50],"an":[51,83],"adaptively":[52],"biased":[53],"(AB)":[54],"technique,":[55],"FIA":[58],"facilitates":[59],"high-speed":[61],"and":[62,103,105,115],"robust":[63],"Pipe-SAR":[64],"ADCs.":[65],"In":[66],"addition,":[67],"rapid-tracking":[69],"bootstrapped":[70],"signal":[71],"generation":[72],"introduced":[74],"achieve":[76],"high-linearity":[77],"with":[78],"short":[79],"sampling":[80,86],"time":[81],"ultra-high":[84],"speed":[85],"network.":[87],"The":[88],"ADC":[89],"prototype":[90],"fabricated":[92],"28nm-CMOS":[95],"process,":[96],"achieved":[98],"spurious-free":[99],"dynamic":[100],"range":[101,153],"(SFDR)":[102],"signal-to-noise":[104],"distortion":[106],"ratio":[107],"(SNDR)":[108],"at":[109,120],"Nyquist":[111],"input":[112,151],"are":[113],"56.4dB":[114],"41.75dB,":[116],"respectively.":[117],"Consuming":[118],"97mW":[119],"13GS/s,":[121],"it":[122],"yields":[123],"Schreier":[125],"figure":[126],"merit":[128],"(<inline-formula":[129],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[130],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[131],"<tex-math":[132],"notation=\"LaTeX\">$\\text{FoM}_{\\mathrm":[133],"{S}}$</tex-math>":[134],"</inline-formula>)":[135],"150dB.":[137],"With":[138],"CMR-FIA,":[141],"ADC\u2019s":[143],"SNDR":[144],"within":[147],"2.48dB":[148],"across":[149],"0.3V":[155],"0.8V.":[157]},"counts_by_year":[],"updated_date":"2026-03-31T06:02:25.137627","created_date":"2025-10-10T00:00:00"}
