{"id":"https://openalex.org/W4412836862","doi":"https://doi.org/10.1109/tcsi.2025.3593691","title":"VASE: Vector Memory Using Bit-Level Address Segmentation for High-Speed Memory Testing","display_name":"VASE: Vector Memory Using Bit-Level Address Segmentation for High-Speed Memory Testing","publication_year":2025,"publication_date":"2025-08-01","ids":{"openalex":"https://openalex.org/W4412836862","doi":"https://doi.org/10.1109/tcsi.2025.3593691"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2025.3593691","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3593691","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045379772","display_name":"Sooryeong Lee","orcid":"https://orcid.org/0009-0002-1669-3692"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sooryeong Lee","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Computer Systems Reliable SoC Laboratory, Yonsei University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0009-0002-1669-3692","affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Computer Systems Reliable SoC Laboratory, Yonsei University, Seoul, South Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101850142","display_name":"Juyong Lee","orcid":"https://orcid.org/0009-0006-0102-3695"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Juyong Lee","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Computer Systems Reliable SoC Laboratory, Yonsei University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0009-0006-0102-3695","affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Computer Systems Reliable SoC Laboratory, Yonsei University, Seoul, South Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100782289","display_name":"Hayoung Lee","orcid":"https://orcid.org/0000-0002-6868-0829"},"institutions":[{"id":"https://openalex.org/I57664883","display_name":"Ajou University","ror":"https://ror.org/03tzb2h73","country_code":"KR","type":"education","lineage":["https://openalex.org/I57664883"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hayoung Lee","raw_affiliation_strings":["Department of Intelligence Semiconductor Engineering, Ajou University, Suwon-si, Gyeonggi-do, South Korea"],"raw_orcid":"https://orcid.org/0000-0002-6868-0829","affiliations":[{"raw_affiliation_string":"Department of Intelligence Semiconductor Engineering, Ajou University, Suwon-si, Gyeonggi-do, South Korea","institution_ids":["https://openalex.org/I57664883"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068528309","display_name":"Sungho Kang","orcid":"https://orcid.org/0000-0002-7093-2095"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sungho Kang","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Computer Systems Reliable SoC Laboratory, Yonsei University, Seoul, South Korea"],"raw_orcid":"https://orcid.org/0000-0002-7093-2095","affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Computer Systems Reliable SoC Laboratory, Yonsei University, Seoul, South Korea","institution_ids":["https://openalex.org/I193775966"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.911,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.74697203,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":"73","issue":"1","first_page":"334","last_page":"346"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9599000215530396,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9599000215530396,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10378","display_name":"Advanced MRI Techniques and Applications","score":0.9455000162124634,"subfield":{"id":"https://openalex.org/subfields/2741","display_name":"Radiology, Nuclear Medicine and Imaging"},"field":{"id":"https://openalex.org/fields/27","display_name":"Medicine"},"domain":{"id":"https://openalex.org/domains/4","display_name":"Health Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5896575450897217},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.4895370900630951},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3398156464099884},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.32899099588394165},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21527644991874695},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1465928554534912}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5896575450897217},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.4895370900630951},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3398156464099884},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.32899099588394165},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21527644991874695},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1465928554534912},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2025.3593691","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3593691","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1676973727","https://openalex.org/W1915857416","https://openalex.org/W1994887588","https://openalex.org/W2011364645","https://openalex.org/W2022202167","https://openalex.org/W2104343580","https://openalex.org/W2108917733","https://openalex.org/W2110637318","https://openalex.org/W2114773166","https://openalex.org/W2125243795","https://openalex.org/W2129265692","https://openalex.org/W2132542265","https://openalex.org/W2139085913","https://openalex.org/W2144004661","https://openalex.org/W2158908276","https://openalex.org/W2162567463","https://openalex.org/W2419236625","https://openalex.org/W2725159389","https://openalex.org/W4200210971","https://openalex.org/W4241517697","https://openalex.org/W4310521022","https://openalex.org/W4312036184","https://openalex.org/W4391640275"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W4327546585","https://openalex.org/W2411923897","https://openalex.org/W4394546135","https://openalex.org/W4285347720","https://openalex.org/W4200259850","https://openalex.org/W2333831899","https://openalex.org/W2484894494"],"abstract_inverted_index":{"To":[0,104],"achieve":[1],"high":[2],"test":[3,20,53,102,134,149,170],"coverage":[4,151],"for":[5,35,181],"scaled-down":[6],"high-speed":[7,30,77,121],"memory,":[8],"the":[9,13,27,33,41,79,88,93,98,106,138,173],"hardware":[10],"complexity":[11],"of":[12,29,81,100,108,167],"algorithmic":[14],"pattern":[15,83,128],"generator":[16],"(ALPG)":[17],"in":[18,55,76,155],"automatic":[19],"equipment":[21],"(ATE)":[22],"has":[23],"increased":[24],"due":[25],"to":[26],"demands":[28],"operation.":[31],"However,":[32],"potential":[34],"further":[36],"speed-up":[37],"is":[38,74,85,124],"constrained":[39],"by":[40,61,87,131],"challenges":[42],"associated":[43],"with":[44],"pipeline":[45],"insertion":[46],"and":[47,152,158],"signal":[48],"integrity":[49],"preservation.":[50],"Unlike":[51],"ALPGs,":[52],"patterns":[54,65,135],"vector":[56,112],"memory":[57,113,122],"(VM)":[58],"are":[59,179],"generated":[60],"simply":[62],"fetching":[63,72],"pre-stored":[64],"without":[66],"performing":[67],"complex":[68],"operations.":[69],"Although":[70,142],"its":[71],"logic":[73,156],"advantageous":[75],"operation,":[78],"speed":[80,130,174],"VM-based":[82],"generation":[84,129],"limited":[86,94],"VM":[89,95,140],"load":[90],"speed.":[91],"Furthermore,":[92],"capacity":[96],"restricts":[97],"storage":[99],"extensive":[101],"patterns.":[103],"address":[105,116],"limitations":[107,147],"both":[109],"approaches,":[110],"a":[111,164],"using":[114],"bit-level":[115],"segmentation":[117],"(VASE)":[118],"that":[119],"enables":[120],"testing":[123],"proposed.":[125],"VASE":[126,143],"improves":[127],"cyclically":[132],"reusing":[133],"while":[136],"reducing":[137],"required":[139],"capacity.":[141],"may":[144],"impose":[145],"some":[146],"on":[148],"algorithm":[150],"incur":[153],"overhead":[154],"area":[157],"power":[159],"consumption,":[160],"it":[161],"still":[162],"supports":[163],"wide":[165],"range":[166],"commonly":[168],"used":[169],"algorithms.":[171],"Considering":[172],"improvements":[175],"achieved,":[176],"these":[177],"trade-offs":[178],"acceptable":[180],"ATE":[182],"applications.":[183]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-08-11T07:18:39.950985","created_date":"2025-10-10T00:00:00"}