{"id":"https://openalex.org/W4410852068","doi":"https://doi.org/10.1109/tcsi.2025.3571064","title":"A Multi-Step ADC With Lightweight Input Buffer Distortion, Sub-Stage Coarse-Fine Gain, and Sampling Skew Background Calibrations","display_name":"A Multi-Step ADC With Lightweight Input Buffer Distortion, Sub-Stage Coarse-Fine Gain, and Sampling Skew Background Calibrations","publication_year":2025,"publication_date":"2025-05-29","ids":{"openalex":"https://openalex.org/W4410852068","doi":"https://doi.org/10.1109/tcsi.2025.3571064"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2025.3571064","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3571064","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007084801","display_name":"Xianghui Pan","orcid":null},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":true,"raw_author_name":"Xianghui Pan","raw_affiliation_strings":["Institute of Microelectronics, Department of Electrical and Computer Engineering, State Key Laboratory of Analog and Mixed Signal VLSI, Faculty of Science and Technology, University of Macau, Macau, China","Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, Institute of Microelectronics, University of Macau, Macau, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Department of Electrical and Computer Engineering, State Key Laboratory of Analog and Mixed Signal VLSI, Faculty of Science and Technology, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, Institute of Microelectronics, University of Macau, Macau, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091926081","display_name":"Buhui Rui","orcid":null},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":false,"raw_author_name":"Buhui Rui","raw_affiliation_strings":["Institute of Microelectronics, Department of Electrical and Computer Engineering, State Key Laboratory of Analog and Mixed Signal VLSI, Faculty of Science and Technology, University of Macau, Macau, China","Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, Institute of Microelectronics, University of Macau, Macau, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Department of Electrical and Computer Engineering, State Key Laboratory of Analog and Mixed Signal VLSI, Faculty of Science and Technology, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, Institute of Microelectronics, University of Macau, Macau, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028059173","display_name":"Yuefeng Cao","orcid":"https://orcid.org/0000-0003-1000-9079"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":false,"raw_author_name":"Yuefeng Cao","raw_affiliation_strings":["Institute of Microelectronics, Department of Electrical and Computer Engineering, State Key Laboratory of Analog and Mixed Signal VLSI, Faculty of Science and Technology, University of Macau, Macau, China","Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, Institute of Microelectronics, University of Macau, Macau, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Department of Electrical and Computer Engineering, State Key Laboratory of Analog and Mixed Signal VLSI, Faculty of Science and Technology, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, Institute of Microelectronics, University of Macau, Macau, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5106943352","display_name":"Rui P. Martins","orcid":"https://orcid.org/0000-0003-2821-648X"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":false,"raw_author_name":"Rui Paulo Martins","raw_affiliation_strings":["Department of Electrical and Computer Engineering, State Key Laboratory of Analog and Mixed-Signal VLSI, Faculty of Science and Technology, Institute of Microelectronics, University of Macau, Macau, China","Department of Electrical and Computer Engineering, Faculty of Science and Technology, Institute of Microelectronics, State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macau, China"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, State Key Laboratory of Analog and Mixed-Signal VLSI, Faculty of Science and Technology, Institute of Microelectronics, University of Macau, Macau, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I204512498"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Faculty of Science and Technology, Institute of Microelectronics, State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macau, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101890729","display_name":"Yan Zhu","orcid":"https://orcid.org/0000-0002-9610-0641"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":false,"raw_author_name":"Yan Zhu","raw_affiliation_strings":["Institute of Microelectronics, Department of Electrical and Computer Engineering, State Key Laboratory of Analog and Mixed Signal VLSI, Faculty of Science and Technology, University of Macau, Macau, China","Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, Institute of Microelectronics, University of Macau, Macau, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Department of Electrical and Computer Engineering, State Key Laboratory of Analog and Mixed Signal VLSI, Faculty of Science and Technology, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, Institute of Microelectronics, University of Macau, Macau, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I204512498"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035229843","display_name":"Chi\u2010Hang Chan","orcid":"https://orcid.org/0000-0002-7635-1101"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN","MO"],"is_corresponding":false,"raw_author_name":"Chi-Hang Chan","raw_affiliation_strings":["Institute of Microelectronics, Department of Electrical and Computer Engineering, State Key Laboratory of Analog and Mixed Signal VLSI, Faculty of Science and Technology, University of Macau, Macau, China","Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, Institute of Microelectronics, University of Macau, Macau, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Department of Electrical and Computer Engineering, State Key Laboratory of Analog and Mixed Signal VLSI, Faculty of Science and Technology, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, Institute of Microelectronics, University of Macau, Macau, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I204512498"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5007084801"],"corresponding_institution_ids":["https://openalex.org/I204512498","https://openalex.org/I4210119392"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.11130566,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"72","issue":"11","first_page":"6567","last_page":"6577"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9761999845504761,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/skew","display_name":"Skew","score":0.7189610004425049},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.5356357097625732},{"id":"https://openalex.org/keywords/stage","display_name":"Stage (stratigraphy)","score":0.5354717969894409},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4397842288017273},{"id":"https://openalex.org/keywords/electrical-impedance","display_name":"Electrical impedance","score":0.42584866285324097},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.42202654480934143},{"id":"https://openalex.org/keywords/distortion","display_name":"Distortion (music)","score":0.42042577266693115},{"id":"https://openalex.org/keywords/buffer-amplifier","display_name":"Buffer amplifier","score":0.41064873337745667},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3392290472984314},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2176152467727661},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2133142650127411},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.15529611706733704},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.15420499444007874},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.15062448382377625},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.09691640734672546}],"concepts":[{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.7189610004425049},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.5356357097625732},{"id":"https://openalex.org/C146357865","wikidata":"https://www.wikidata.org/wiki/Q1123245","display_name":"Stage (stratigraphy)","level":2,"score":0.5354717969894409},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4397842288017273},{"id":"https://openalex.org/C17829176","wikidata":"https://www.wikidata.org/wiki/Q179043","display_name":"Electrical impedance","level":2,"score":0.42584866285324097},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.42202654480934143},{"id":"https://openalex.org/C126780896","wikidata":"https://www.wikidata.org/wiki/Q899871","display_name":"Distortion (music)","level":4,"score":0.42042577266693115},{"id":"https://openalex.org/C127749002","wikidata":"https://www.wikidata.org/wiki/Q978470","display_name":"Buffer amplifier","level":4,"score":0.41064873337745667},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3392290472984314},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2176152467727661},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2133142650127411},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.15529611706733704},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.15420499444007874},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.15062448382377625},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.09691640734672546},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2025.3571064","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3571064","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1980893811","https://openalex.org/W2071267997","https://openalex.org/W2291378518","https://openalex.org/W2586741979","https://openalex.org/W2920991553","https://openalex.org/W2988320438","https://openalex.org/W3015454294","https://openalex.org/W3183472985","https://openalex.org/W4280647551","https://openalex.org/W4376150529","https://openalex.org/W4383503616","https://openalex.org/W4386038325","https://openalex.org/W4404179377"],"related_works":["https://openalex.org/W4290802965","https://openalex.org/W97789383","https://openalex.org/W3087516072","https://openalex.org/W4289406402","https://openalex.org/W2727156679","https://openalex.org/W2067997904","https://openalex.org/W2364071303","https://openalex.org/W1483053255","https://openalex.org/W2111165123","https://openalex.org/W2074175666"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,91],"lightweight":[4],"background":[5],"calibration":[6,36],"for":[7],"the":[8,11,24,35,43,46,55,58,67,76,79,84,101,114],"distortion":[9],"of":[10,45,78],"analog-to-digital":[12],"converter":[13],"(ADC)\u2019s":[14],"input":[15,44,107],"buffer.":[16,47],"The":[17],"buffer\u2019s":[18],"nonlinearity":[19],"is":[20,32,51],"calibrated":[21,73],"on-chip":[22],"by":[23,34,39,74],"Harmonic-Compensated":[25],"Diode":[26],"Load":[27],"(HC-DL),":[28],"whose":[29],"bias":[30],"voltage":[31],"determined":[33],"algorithm":[37],"facilitated":[38],"dither":[40],"injection":[41],"at":[42,66,83,105],"A":[48],"two-step":[49],"ADC":[50,60,96],"exploited":[52],"to":[53],"demonstrate":[54],"calibration,":[56],"where":[57],"coarse-fine":[59],"gain":[61],"mismatch":[62],"and":[63,103,113],"sampling":[64],"skew":[65],"1<sup":[68],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[69,86],"xmlns:xlink=\"http://www.w3.org/1999/xlink\"><b>st</b></sup>":[70],"step":[71],"are":[72,108],"monitoring":[75],"occupation":[77],"correction":[80],"range":[81],"(OCR)":[82],"2<sup":[85],"xmlns:xlink=\"http://www.w3.org/1999/xlink\"><b>nd</b></sup>":[87],"step.":[88],"Verified":[89],"in":[90,97],"12b":[92],"1":[93],"GS/s":[94],"pipe-SAR":[95],"28":[98],"nm":[99],"CMOS,":[100],"SNDR":[102],"SFDR":[104,115],"Nyquist":[106],"60.96":[109],"dB/76.8":[110],"dB,":[111],"respectively":[112],"keeps":[116],">75":[117],"dB":[118],"over":[119],"PVT.":[120]},"counts_by_year":[],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}