{"id":"https://openalex.org/W4410737481","doi":"https://doi.org/10.1109/tcsi.2025.3570805","title":"DrlGoFPGA: FPGA Global Placement Considering Input-Output Buffer Based on Deep Reinforcement Learning and Gradient Optimization","display_name":"DrlGoFPGA: FPGA Global Placement Considering Input-Output Buffer Based on Deep Reinforcement Learning and Gradient Optimization","publication_year":2025,"publication_date":"2025-05-26","ids":{"openalex":"https://openalex.org/W4410737481","doi":"https://doi.org/10.1109/tcsi.2025.3570805"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2025.3570805","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3570805","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101623537","display_name":"Kang Yang","orcid":"https://orcid.org/0000-0002-1366-1110"},"institutions":[{"id":"https://openalex.org/I139759216","display_name":"Beijing University of Posts and Telecommunications","ror":"https://ror.org/04w9fbh59","country_code":"CN","type":"education","lineage":["https://openalex.org/I139759216"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Kang Yang","raw_affiliation_strings":["School of Integrated Circuit, Beijing University of Posts and Telecommunications, Beijing, China"],"affiliations":[{"raw_affiliation_string":"School of Integrated Circuit, Beijing University of Posts and Telecommunications, Beijing, China","institution_ids":["https://openalex.org/I139759216"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016813457","display_name":"Jianwang Zhai","orcid":"https://orcid.org/0000-0002-1581-3536"},"institutions":[{"id":"https://openalex.org/I139759216","display_name":"Beijing University of Posts and Telecommunications","ror":"https://ror.org/04w9fbh59","country_code":"CN","type":"education","lineage":["https://openalex.org/I139759216"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jianwang Zhai","raw_affiliation_strings":["School of Integrated Circuit, Beijing University of Posts and Telecommunications, Beijing, China"],"affiliations":[{"raw_affiliation_string":"School of Integrated Circuit, Beijing University of Posts and Telecommunications, Beijing, China","institution_ids":["https://openalex.org/I139759216"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077408167","display_name":"Liuyu Xiang","orcid":"https://orcid.org/0000-0001-8486-6255"},"institutions":[{"id":"https://openalex.org/I139759216","display_name":"Beijing University of Posts and Telecommunications","ror":"https://ror.org/04w9fbh59","country_code":"CN","type":"education","lineage":["https://openalex.org/I139759216"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Liuyu Xiang","raw_affiliation_strings":["School of Artificial Intelligence, Beijing University of Posts and Telecommunications, Beijing, China"],"affiliations":[{"raw_affiliation_string":"School of Artificial Intelligence, Beijing University of Posts and Telecommunications, Beijing, China","institution_ids":["https://openalex.org/I139759216"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103789966","display_name":"Z. L. Huang","orcid":null},"institutions":[{"id":"https://openalex.org/I139759216","display_name":"Beijing University of Posts and Telecommunications","ror":"https://ror.org/04w9fbh59","country_code":"CN","type":"education","lineage":["https://openalex.org/I139759216"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zixi Huang","raw_affiliation_strings":["School of Artificial Intelligence, Beijing University of Posts and Telecommunications, Beijing, China"],"affiliations":[{"raw_affiliation_string":"School of Artificial Intelligence, Beijing University of Posts and Telecommunications, Beijing, China","institution_ids":["https://openalex.org/I139759216"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090936368","display_name":"Dan Wu","orcid":"https://orcid.org/0000-0001-9669-2600"},"institutions":[{"id":"https://openalex.org/I139759216","display_name":"Beijing University of Posts and Telecommunications","ror":"https://ror.org/04w9fbh59","country_code":"CN","type":"education","lineage":["https://openalex.org/I139759216"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dan Wu","raw_affiliation_strings":["School of Artificial Intelligence, Beijing University of Posts and Telecommunications, Beijing, China"],"affiliations":[{"raw_affiliation_string":"School of Artificial Intelligence, Beijing University of Posts and Telecommunications, Beijing, China","institution_ids":["https://openalex.org/I139759216"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008602975","display_name":"Yida Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I139759216","display_name":"Beijing University of Posts and Telecommunications","ror":"https://ror.org/04w9fbh59","country_code":"CN","type":"education","lineage":["https://openalex.org/I139759216"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yida Wang","raw_affiliation_strings":["School of Artificial Intelligence, Beijing University of Posts and Telecommunications, Beijing, China"],"affiliations":[{"raw_affiliation_string":"School of Artificial Intelligence, Beijing University of Posts and Telecommunications, Beijing, China","institution_ids":["https://openalex.org/I139759216"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027087200","display_name":"Kang Zhao","orcid":"https://orcid.org/0000-0003-0502-8523"},"institutions":[{"id":"https://openalex.org/I139759216","display_name":"Beijing University of Posts and Telecommunications","ror":"https://ror.org/04w9fbh59","country_code":"CN","type":"education","lineage":["https://openalex.org/I139759216"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kang Zhao","raw_affiliation_strings":["School of Integrated Circuit, Beijing University of Posts and Telecommunications, Beijing, China"],"affiliations":[{"raw_affiliation_string":"School of Integrated Circuit, Beijing University of Posts and Telecommunications, Beijing, China","institution_ids":["https://openalex.org/I139759216"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013642287","display_name":"Ming Lei","orcid":"https://orcid.org/0000-0003-4696-9346"},"institutions":[{"id":"https://openalex.org/I139759216","display_name":"Beijing University of Posts and Telecommunications","ror":"https://ror.org/04w9fbh59","country_code":"CN","type":"education","lineage":["https://openalex.org/I139759216"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ming Lei","raw_affiliation_strings":["School of Integrated Circuit, Beijing University of Posts and Telecommunications, Beijing, China"],"affiliations":[{"raw_affiliation_string":"School of Integrated Circuit, Beijing University of Posts and Telecommunications, Beijing, China","institution_ids":["https://openalex.org/I139759216"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5057318866","display_name":"Zhaofeng He","orcid":"https://orcid.org/0000-0002-3433-8435"},"institutions":[{"id":"https://openalex.org/I139759216","display_name":"Beijing University of Posts and Telecommunications","ror":"https://ror.org/04w9fbh59","country_code":"CN","type":"education","lineage":["https://openalex.org/I139759216"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhaofeng He","raw_affiliation_strings":["School of Artificial Intelligence, Beijing University of Posts and Telecommunications, Beijing, China"],"affiliations":[{"raw_affiliation_string":"School of Artificial Intelligence, Beijing University of Posts and Telecommunications, Beijing, China","institution_ids":["https://openalex.org/I139759216"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":9,"corresponding_author_ids":["https://openalex.org/A5101623537"],"corresponding_institution_ids":["https://openalex.org/I139759216"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12055073,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"72","issue":"11","first_page":"7016","last_page":"7029"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9822999835014343,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9822999835014343,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9685999751091003,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9681000113487244,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reinforcement-learning","display_name":"Reinforcement learning","score":0.6558801531791687},{"id":"https://openalex.org/keywords/buffer","display_name":"Buffer (optical fiber)","score":0.6537277102470398},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.619747519493103},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5874624252319336},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.4702284038066864},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.34347569942474365},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23939013481140137},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.19137179851531982},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.1562488079071045},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09944027662277222}],"concepts":[{"id":"https://openalex.org/C97541855","wikidata":"https://www.wikidata.org/wiki/Q830687","display_name":"Reinforcement learning","level":2,"score":0.6558801531791687},{"id":"https://openalex.org/C145018004","wikidata":"https://www.wikidata.org/wiki/Q4985944","display_name":"Buffer (optical fiber)","level":2,"score":0.6537277102470398},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.619747519493103},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5874624252319336},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.4702284038066864},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.34347569942474365},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23939013481140137},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.19137179851531982},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.1562488079071045},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09944027662277222},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcsi.2025.3570805","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3570805","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G2805850703","display_name":null,"funder_award_id":"62206012","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G4800139155","display_name":null,"funder_award_id":"62301066","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G8361507201","display_name":null,"funder_award_id":"62176025","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G858523971","display_name":null,"funder_award_id":"2023RC72","funder_id":"https://openalex.org/F4320335787","funder_display_name":"Fundamental Research Funds for the Central Universities"},{"id":"https://openalex.org/G8709529125","display_name":null,"funder_award_id":"U21B2045","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320335787","display_name":"Fundamental Research Funds for the Central Universities","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W2037891144","https://openalex.org/W2328615082","https://openalex.org/W2595334824","https://openalex.org/W2919372546","https://openalex.org/W2945592068","https://openalex.org/W2964015378","https://openalex.org/W2989034947","https://openalex.org/W2990768660","https://openalex.org/W2997871849","https://openalex.org/W3043169486","https://openalex.org/W3103981520","https://openalex.org/W3107133478","https://openalex.org/W3140077234","https://openalex.org/W3197603378","https://openalex.org/W4212918377","https://openalex.org/W4293023444","https://openalex.org/W4385245566","https://openalex.org/W4388079952","https://openalex.org/W4388969256","https://openalex.org/W4389936145","https://openalex.org/W4391183716","https://openalex.org/W4401414256"],"related_works":["https://openalex.org/W2097227107","https://openalex.org/W2366025885","https://openalex.org/W4233342643","https://openalex.org/W2111241003","https://openalex.org/W4306904969","https://openalex.org/W2355315220","https://openalex.org/W4200391368","https://openalex.org/W2210979487","https://openalex.org/W2138720691","https://openalex.org/W4362501864"],"abstract_inverted_index":{"The":[0,17,157],"placement":[1,20,32,49,59,92,142,166,189],"of":[2,14,79,123],"the":[3,9,15,76,112,120,135,150,154,164,187],"input-output":[4],"buffer":[5],"(IOBUF)":[6],"can":[7,172],"impact":[8],"performance":[10],"and":[11,33,81,94,119,182,186],"power":[12],"consumption":[13],"FPGA.":[16],"existing":[18],"global":[19],"(GP)":[21],"methods":[22],"lack":[23],"consideration":[24],"for":[25],"IOBUF,":[26],"resulting":[27],"in":[28,31,134],"a":[29,42,82,129],"decrease":[30],"routing":[34],"quality.":[35],"To":[36],"address":[37],"this":[38],"issue,":[39],"we":[40],"propose":[41],"GP":[43,174],"framework,":[44],"DrlGoFPGA,":[45],"which":[46],"combines":[47],"IOBUF":[48,91,101,141,151,188],"based":[50,60,168],"on":[51,61,169],"deep":[52],"reinforcement":[53],"learning":[54],"(DRL)":[55],"with":[56,69,163],"other":[57],"instances":[58],"gradient":[62],"optimization":[63],"(GO).":[64],"A":[65],"policy":[66],"network":[67,132],"structure":[68],"multi-action":[70],"sampling":[71],"is":[72,86,108,145],"designed":[73,87,109,146],"to":[74,88,110,115,147],"accelerate":[75],"running":[77],"speed":[78,175],"DRL,":[80],"parallelizable":[83],"reward":[84,97],"function":[85],"optimize":[89],"each":[90],"action":[93],"avoid":[95],"sparse":[96],"problems.":[98],"Then,":[99],"an":[100,140],"line-network":[102],"relationship":[103],"(ILNR)":[104],"graph":[105,121,130],"creation":[106],"method":[107,144],"improve":[111,173],"agent\u2019s":[113],"ability":[114],"explore":[116],"optimal":[117],"solutions,":[118],"features":[122],"ILNR":[124],"by":[125,176,180,184],"capturing":[126],"them":[127],"through":[128],"neural":[131,137],"embedded":[133],"convolutional":[136],"network.":[138],"Finally,":[139],"legalization":[143],"ensure":[148],"that":[149,161],"position":[152],"meets":[153],"FPGA":[155],"architecture.":[156],"experimental":[158],"results":[159],"show":[160],"compared":[162],"state-of-the-art":[165],"tools":[167],"GO,":[170],"DrlGoFPGA":[171],"13.2%-7\u00d7,":[177],"half-perimeter":[178],"wirelength":[179,183],"0.2%-2.6%,":[181],"0.2%-1.5%":[185],"model":[190],"has":[191],"good":[192],"generalization.":[193]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}