{"id":"https://openalex.org/W4410737563","doi":"https://doi.org/10.1109/tcsi.2025.3570016","title":"Workload Compression Techniques to Scale Defect-Centric BTI Models to the Circuit Level","display_name":"Workload Compression Techniques to Scale Defect-Centric BTI Models to the Circuit Level","publication_year":2025,"publication_date":"2025-05-26","ids":{"openalex":"https://openalex.org/W4410737563","doi":"https://doi.org/10.1109/tcsi.2025.3570016"},"language":"en","primary_location":{"id":"doi:10.1109/tcsi.2025.3570016","is_oa":true,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3570016","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://doi.org/10.1109/tcsi.2025.3570016","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5117699987","display_name":"Andr\u00e9s Santana Andreo","orcid":"https://orcid.org/0000-0002-1377-2961"},"institutions":[{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]},{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Andr\u00e9s Santana Andreo","raw_affiliation_strings":["Instituto de Microelectrónica de Sevilla (IMSE, CNM (Universidad de Sevilla, CSIC), Seville, Spain","Instituto de Microelectrónica de Sevilla (IMSE-CNM), CSIC, Universidad de Sevilla, Seville, Spain"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectrónica de Sevilla (IMSE, CNM (Universidad de Sevilla, CSIC), Seville, Spain","institution_ids":["https://openalex.org/I4210104545"]},{"raw_affiliation_string":"Instituto de Microelectrónica de Sevilla (IMSE-CNM), CSIC, Universidad de Sevilla, Seville, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027765192","display_name":"Victor M. van Santen","orcid":"https://orcid.org/0000-0002-6629-4713"},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Victor M. van Santen","raw_affiliation_strings":["Technical University of Munich; TUM School of Computation, Information and Technology; Chair of AI Processor Design; Munich Institute of Robotics and Machine Intelligence, Munich, Germany","TUM School of Computation, Information and Technology, the Chair of AI Processor Design, Technical University of Munich, Munich Institute of Robotics and Machine Intelligence, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Technical University of Munich; TUM School of Computation, Information and Technology; Chair of AI Processor Design; Munich Institute of Robotics and Machine Intelligence, Munich, Germany","institution_ids":["https://openalex.org/I62916508"]},{"raw_affiliation_string":"TUM School of Computation, Information and Technology, the Chair of AI Processor Design, Technical University of Munich, Munich Institute of Robotics and Machine Intelligence, Munich, Germany","institution_ids":["https://openalex.org/I62916508"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068422347","display_name":"R. Castro\u2010L\u00f3pez","orcid":"https://orcid.org/0000-0002-6247-3124"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Rafael Castro-L\u00f3pez","raw_affiliation_strings":["Instituto de Microelectrónica de Sevilla (IMSE, CNM (Universidad de Sevilla, CSIC), Seville, Spain","Instituto de Microelectrónica de Sevilla (IMSE-CNM), CSIC, Universidad de Sevilla, Seville, Spain"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectrónica de Sevilla (IMSE, CNM (Universidad de Sevilla, CSIC), Seville, Spain","institution_ids":["https://openalex.org/I4210104545"]},{"raw_affiliation_string":"Instituto de Microelectrónica de Sevilla (IMSE-CNM), CSIC, Universidad de Sevilla, Seville, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011140420","display_name":"E. Roca","orcid":"https://orcid.org/0000-0001-6260-6495"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Elisenda Roca","raw_affiliation_strings":["Instituto de Microelectrónica de Sevilla (IMSE, CNM (Universidad de Sevilla, CSIC), Seville, Spain","Instituto de Microelectrónica de Sevilla (IMSE-CNM), CSIC, Universidad de Sevilla, Seville, Spain"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectrónica de Sevilla (IMSE, CNM (Universidad de Sevilla, CSIC), Seville, Spain","institution_ids":["https://openalex.org/I4210104545"]},{"raw_affiliation_string":"Instituto de Microelectrónica de Sevilla (IMSE-CNM), CSIC, Universidad de Sevilla, Seville, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059133190","display_name":"Hussam Amrouch","orcid":"https://orcid.org/0000-0002-5649-3102"},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Hussam Amrouch","raw_affiliation_strings":["Technical University of Munich; TUM School of Computation, Information and Technology; Chair of AI Processor Design; Munich Institute of Robotics and Machine Intelligence, Munich, Germany","TUM School of Computation, Information and Technology, the Chair of AI Processor Design, Technical University of Munich, Munich Institute of Robotics and Machine Intelligence, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Technical University of Munich; TUM School of Computation, Information and Technology; Chair of AI Processor Design; Munich Institute of Robotics and Machine Intelligence, Munich, Germany","institution_ids":["https://openalex.org/I62916508"]},{"raw_affiliation_string":"TUM School of Computation, Information and Technology, the Chair of AI Processor Design, Technical University of Munich, Munich Institute of Robotics and Machine Intelligence, Munich, Germany","institution_ids":["https://openalex.org/I62916508"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5041853563","display_name":"F.V. Fern\u00e1ndez","orcid":"https://orcid.org/0000-0001-8682-2280"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Francisco V. Fern\u00e1ndez","raw_affiliation_strings":["Instituto de Microelectrónica de Sevilla (IMSE, CNM (Universidad de Sevilla, CSIC), Seville, Spain","Instituto de Microelectrónica de Sevilla (IMSE-CNM), CSIC, Universidad de Sevilla, Seville, Spain"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectrónica de Sevilla (IMSE, CNM (Universidad de Sevilla, CSIC), Seville, Spain","institution_ids":["https://openalex.org/I4210104545"]},{"raw_affiliation_string":"Instituto de Microelectrónica de Sevilla (IMSE-CNM), CSIC, Universidad de Sevilla, Seville, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5117699987"],"corresponding_institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12055972,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"72","issue":"11","first_page":"7044","last_page":"7057"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9936000108718872,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9911999702453613,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/compression","display_name":"Compression (physics)","score":0.5636270642280579},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5131145119667053},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5082287788391113},{"id":"https://openalex.org/keywords/workload","display_name":"Workload","score":0.5052366852760315},{"id":"https://openalex.org/keywords/scale","display_name":"Scale (ratio)","score":0.4980471134185791},{"id":"https://openalex.org/keywords/equivalent-circuit","display_name":"Equivalent circuit","score":0.47893795371055603},{"id":"https://openalex.org/keywords/discrete-circuit","display_name":"Discrete circuit","score":0.44267603754997253},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3497324585914612},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24986279010772705},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.23923027515411377},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.2326665222644806},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.11245995759963989}],"concepts":[{"id":"https://openalex.org/C180016635","wikidata":"https://www.wikidata.org/wiki/Q2712821","display_name":"Compression (physics)","level":2,"score":0.5636270642280579},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5131145119667053},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5082287788391113},{"id":"https://openalex.org/C2778476105","wikidata":"https://www.wikidata.org/wiki/Q628539","display_name":"Workload","level":2,"score":0.5052366852760315},{"id":"https://openalex.org/C2778755073","wikidata":"https://www.wikidata.org/wiki/Q10858537","display_name":"Scale (ratio)","level":2,"score":0.4980471134185791},{"id":"https://openalex.org/C23572009","wikidata":"https://www.wikidata.org/wiki/Q964981","display_name":"Equivalent circuit","level":3,"score":0.47893795371055603},{"id":"https://openalex.org/C188058453","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Discrete circuit","level":4,"score":0.44267603754997253},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3497324585914612},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24986279010772705},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.23923027515411377},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.2326665222644806},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.11245995759963989},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcsi.2025.3570016","is_oa":true,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3570016","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},{"id":"pmh:oai:digital.csic.es:10261/410065","is_oa":true,"landing_page_url":"http://hdl.handle.net/10261/410065","pdf_url":null,"source":{"id":"https://openalex.org/S4306400616","display_name":"DIGITAL.CSIC (Spanish National Research Council (CSIC))","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I134820265","host_organization_name":"Consejo Superior de Investigaciones Cient\u00edficas","host_organization_lineage":["https://openalex.org/I134820265"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/publishedVersion"}],"best_oa_location":{"id":"doi:10.1109/tcsi.2025.3570016","is_oa":true,"landing_page_url":"https://doi.org/10.1109/tcsi.2025.3570016","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Circuits and Systems I: Regular Papers","raw_type":"journal-article"},"sustainable_development_goals":[{"score":0.550000011920929,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":38,"referenced_works":["https://openalex.org/W1527783100","https://openalex.org/W1529164337","https://openalex.org/W1903664830","https://openalex.org/W1956210796","https://openalex.org/W1965493119","https://openalex.org/W1965709632","https://openalex.org/W1999323601","https://openalex.org/W2134777311","https://openalex.org/W2147381694","https://openalex.org/W2147685203","https://openalex.org/W2149134343","https://openalex.org/W2401779648","https://openalex.org/W2548602630","https://openalex.org/W2620862878","https://openalex.org/W2734631967","https://openalex.org/W2773750423","https://openalex.org/W2897503979","https://openalex.org/W2904569294","https://openalex.org/W2909727190","https://openalex.org/W2921402340","https://openalex.org/W2994706186","https://openalex.org/W3038337678","https://openalex.org/W3038803137","https://openalex.org/W3043397599","https://openalex.org/W3163618335","https://openalex.org/W3194625917","https://openalex.org/W3216440684","https://openalex.org/W4210454259","https://openalex.org/W4210944453","https://openalex.org/W4225301053","https://openalex.org/W4285023414","https://openalex.org/W4293094424","https://openalex.org/W4294310855","https://openalex.org/W4297097413","https://openalex.org/W4313528880","https://openalex.org/W4383750184","https://openalex.org/W4391057916","https://openalex.org/W4398162680"],"related_works":["https://openalex.org/W2015676400","https://openalex.org/W2903040555","https://openalex.org/W2018705424","https://openalex.org/W2129446522","https://openalex.org/W2053420533","https://openalex.org/W3216318046","https://openalex.org/W2017848804","https://openalex.org/W2181172762","https://openalex.org/W3128753656","https://openalex.org/W2117286774"],"abstract_inverted_index":{"Bias":[0],"Temperature":[1],"Instability":[2],"(BTI)":[3],"poses":[4],"a":[5,87,122,161],"significant":[6],"challenge":[7],"in":[8,83,105,127,141,153],"ensuring":[9],"the":[10,16,43,48,70,78,93,137,142,174,178,198],"reliability":[11],"of":[12,18,45,69,73,80,107,155],"digital":[13,19,56,163],"systems,":[14],"affecting":[15],"delay":[17],"logic":[20],"gates,":[21],"which":[22,157],"ultimately":[23],"can":[24,120],"lead":[25],"into":[26,96],"timing":[27],"failures.":[28],"Sophisticated":[29],"defect-centric":[30,74,195],"models":[31,82,196],"have":[32],"been":[33],"developed":[34],"and":[35,98,119,144,185,192],"successfully":[36],"calibrated":[37],"against":[38],"empirical":[39],"data":[40],"to":[41,54,91,190,197],"forecast":[42],"impacts":[44],"BTI":[46],"at":[47],"device":[49],"level.":[50,200],"However,":[51],"their":[52],"application":[53,79],"large-scale":[55],"circuits":[57],"operating":[58],"under":[59],"realistic":[60],"workloads":[61,95],"over":[62],"typical":[63],"system":[64],"lifetimes":[65],"is":[66,90,158],"limited":[67],"because":[68],"computational":[71],"complexity":[72],"models.":[75],"To":[76],"make":[77],"aging":[81,117],"that":[84,149],"context":[85],"feasible,":[86],"useful":[88],"technique":[89,172],"compress":[92],"transistor":[94],"simplified":[97],"hence":[99],"manageable":[100],"representative":[101],"workloads.":[102],"While":[103],"fast":[104],"terms":[106,154],"execution":[108,188],"speed,":[109],"previous":[110],"techniques":[111,139],"struggle":[112],"with":[113],"accuracy":[114],"when":[115],"predicting":[116],"degradation,":[118],"reach":[121],"very":[123],"high":[124],"average":[125],"error":[126],"threshold":[128],"voltage":[129],"increase":[130],"prediction.":[131],"In":[132],"this":[133],"work,":[134],"we":[135],"review":[136],"compression":[138,171],"described":[140],"literature":[143],"propose":[145],"two":[146],"novel":[147],"approaches":[148],"surpass":[150],"existing":[151],"ones":[152],"accuracy,":[156],"demonstrated":[159],"for":[160],"complex":[162],"design":[164],"used":[165],"as":[166],"benchmark.":[167],"Specifically,":[168],"our":[169],"best":[170],"matches":[173],"predictions":[175],"obtained":[176],"through":[177],"reference":[179],"uncompressed":[180],"workloads,":[181],"introducing":[182],"negligible":[183],"error,":[184],"maintains":[186],"low":[187],"times":[189],"efficiently":[191],"accurately":[193],"scale":[194],"circuit":[199]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}